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This paper presents a detailed analysis of thermal coupling and self-heating effects in highly integrated wireless transmitters. A MIMO transmitter prototype consisting of two closely integrated power amplifiers was built and modelled through microwave and thermal characterizations. The thermal behavior was extracted using FEM software and modelled with an equivalent RC network. The PA model was obtained...
A new methodology for the prediction of oscillator phase noise under the effect of an interference signal is presented. It is based on a semi-analytical formulation in the presence of the noisy interferer, using a realistic oscillator model extracted from harmonic-balance simulations. The theoretical analysis of the phase process enables the derivation of key mathematical properties, used for an efficient...
Distributed synchronization of sensor networks can be achieved by coupling the oscillator signals of the sensor nodes. Previous works describe the coupling effects in an idealized manner, with constant scalar coefficients. Here a realistic analysis of the coupled-system dynamics is presented for the first time to our knowledge, taking into account the antenna gains and propagation effects on the amplitude...
We examine the problem of optimizing the linearity and dynamic range of a FET device, with application to carbon-nanotube (CNT) FETs. To develop insight into the way FET parameters affect linearity, we derive expressions for noise figure, intermodulation distortion, and dynamic range of a FET described by a unilateral equivalent circuit. This exercise identifies criteria for optimizing linearity and...
In this paper, a simulation methodology is presented that takes carrier dynamics into account, disallowing instantaneous changes in substrate carrier concentrations, and providing more accurate estimations of harmonic distortion (HD) components. Using this method, we simulated the HD components introduced in a CPW line on various flavors of Si-based substrates. The results are compared to measured...
This paper presents a 0.49 terahertz (THz) radiating source in 40 nm CMOS. The radiating source is composed of a cross-coupled oscillator, a differential tripler, a substrate integrated waveguide (SIW) based harmonic power extractor (HPE) and a folded dipole antenna. The HPE can optimize third harmonic power extraction and provide suppression of unwanted lower order harmonic leakage. The measured...
A wideband THz imaging transmitter in a 65-nm bulk CMOS process is demonstrated. The TX generates 0.73 mW of peak Pout at 448 GHz and operates over a setup-limited bandwidth of 15% by using an energy efficient frequency quadrupler implemented with a cascade of two frequency doublers, and by co-optimizing the power driver and accumulation-mode symmetric MOS varactor frequency tripler. The TX has the...
This paper demonstrates a fully-integrated Cartesian feedback loop transmitter (TX) in CMOS 65nm. LO path phase shifters, aiming at compensating the phase misalignments between up- and down-conversion mixers or RF path phase delays, are improved by an interpolation scheme to ensure consecutive 360° tuning range. Power supplies of different circuit blocks are separated to cut off the nested feedback...
A 8 Gbit/s current-mode automatic gain control (CMAGC) amplifier with a reconfigurability between an internal closed loop control (analog AGC) and external baseband feedback control (digital AGC) is introduced in this paper. By using the p-n diode in CMOS technology, this CMAGC achieves an exponential variable gain control and a logarithmic power detection with more than 24 dB dynamic range. The proposed...
Interferences injected to an RF circuit may strongly deteriorate the electrical performance. Parasitic coupling via substrate is one of the dominant interference transmission mechanisms in highly integrated systems. The effect of substrate coupling becomes more critical at higher circuit frequencies. This poses a particular challenge for highly integrated millimeter-wave systems, since isolation techniques...
This paper presents the design, the realization and the power characteristics of plastic low cost packaged symmetric Doherty Power Amplifiers (DPA) operating in the 5.5–6.5GHz bandwidth. A single input (SI-DPA) and a dual input (DI-DPA) DPAs are proposed based on two power bars composed of two GaN HEMT cells (8 fingers of 275μm unit gate width). Input and output matching networks are designed on passive...
A novel semi-integrated three-way 1:2:1 Doherty amplifier architecture is proposed to address the high efficiency / low cost / small footprint challenges of small cells. Based on this approach, a 35 × 35 mm2 amplifier using a 60 W MMIC is designed for the 2.11 to 2.17 GHz frequency band. It achieves a maximum gain of 27.4 dB, an average PAE of 48.5 % at 8 dB back-off, and can be linearized to lower...
A highly linear fully integrated 40 W 2-stage Doherty power amplifier (DPA) for 4/5G communication systems is introduced. By using the digital pre-distortion (DPD) technique, the proposed DPA achieved −58 dBc ACLR with 42% total lineup efficiency at 39 dBm average output power with a 365 MHz IBW at a center frequency of 2 GHz. To extend instantaneous bandwidth (IBW), the proposed power amplifier (PA)...
The design and performance of a unique MMIC power amplifier chip set covering the 2 to 18 GHz band using a 0.2μm GaN HEMT process is presented. Measured results of the output MMIC show an average output power of 18 to 20 W and an average PAE greater than 27% across the 2 to 18 GHz band, while the driver MMIC demonstrates an 8 to 10 W capability with an average PAE of 28% across the 2 to 18 GHz band...
A novel series-stacked large swing push-pull MOS-HBT driver was implemented in 55nm SiGe BiCMOS technology. The circuit achieves 4.8Vpp differential swing, 57.5GHz band-width and has an output compression point of 12 dBm per side. 4-PAM and 8-PAM eye diagrams were measured at 56 GBaud for a record data rate of 168 Gb/s. 4-PAM 64GBaud eye diagrams were also demonstrated. The circuit consumes 820/600...
A 128-GS/s 63-GHz-bandwidth 2:1 analog-multiplexer (AMUX) module has been developed for ultrabroadband digital-to-analog (D/A) conversion subsystems. The AMUX IC was fabricated using 0.5-μm-emitter InP HBTs, which have a peak ft and fmax of 290 and 320 GHz, respectively. The IC has a through bandwidth of 67 GHz. We developed an ultra-low-loss metal package equipped with G3PO (SMPS) connectors. The...
A broadband high-speed high-linearity track-and-hold amplifier (THA) is presented in this paper using 0.18 μm SiGe process. A switched emitter follower track-and-hold (T/H) stage with cascode stage is adopted to achieve high resolution for analog-to-digital conversion. A modified Darlington amplifier with peaking technique is used to enhance the input bandwidth. With a dc power consumption of 94.3...
An 80 Gbps 215-1 pseudo-random bit sequence (PRBS) generator offering a unique feature of two programmable channels is presented. It is possible to select either a replica of the full rate stream, two parallel streams at half the rate, or a combination of external and internal pattern to the output. This flexibility makes the design suitable for generating proper test signal for both binary and 4-PAM...
In this paper it will be shown that cascading Delta-Sigma Modulators with different sampling rates can have a considerable impact in relaxing the high quality factor of the analog output filter used in All-Digital Transmitters. In particular, a significant reduction of the noise peak power can be achieved with just minor changes in the hardware. This novel concept has been successfully implemented...
An FPGA-based all-digital transmitter with 9.6-GHz 2nd order Time-Interleaved ΔΣ-modulation (TI-DSM) is presented. To improve the operation frequency of TI-DSM, bit separation architecture is proposed. This proposed architecture realizes the 1-bit digital transmitter with 500-MHz bandwidth. This is the widest bandwidth modulation among state-of-the-art FPGA-based all-digital transmitters.
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