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In recent years, GaN power HEMTs are gaining acceptance in power electronic applications. However, the implementation of Class D audio power amplifiers application using GaN power HEMTs has not been widely studied. This paper studies the performance of two open-loop 25 W Class D audio power amplifiers with GaN and silicon output stages using a Pulse Density Modulation (PDM) scheme. Comparisons of...
The LTE-Advanced and its related market factors present many challenges for the RF power amplifier (PA) and front end designs. This paper reviews some of the emerging techniques such as dynamic supply voltage modulation, reconfigurable PA, FET stacking and power combining to solve these challenges for silicon based PAs. These techniques with advanced CMOS and SiGe technologies can benefit the future...
A modulation depth and output power tunable 5.8-GHz CMOS direct-conversion transmitter based on current-mode operation is proposed in this paper. The proposed transmitter consists of an 8bit DAC, LPF, direct up-conversion mixer, a divided-by-two circuit, and PA. The matching network of PA is outside the chip. A binary, unary, segmented current steering DAC is used with the function to achieve 16 levels...
To facilitate the development of low-cost, low-power, and high-density hardware neural networks, we have successfully developed a Ta/TaOx/TiO2/Ti RRAM-based synaptic device. The device exhibits numerous synaptic functions resembling those in biological synapses, including synaptic plasticity of potentiation and depression, spike-timing dependent plasticity, paired-pulse facilitation and a transition...
Single drain select transistor (DSL) in 3D Flash memory may exhibit higher leakage as compared with DSL in 2D NAND, because of worse subthreshold swing characteristics due to poly-Si channel. Select transistor leakage suppression is essential in 3D NAND Flash Memory, in consideration of boosting potential and program disturbance. Compared to single Si drain select transistor in 2D planner Flash Memory,...
This paper proposes a digital dither technique to suppress limit cycles in a ΔΣ DA modulator. It uses an exclusive OR (XOR) gate at the modulator output and the digital dither is generated by another ΔΣD modulator. The resolution of the DAC following the modulator is 1-bit (instead of multi-bit) thanks to XOR gate usage, and the overall SNR does not degrade because the dither is added at the output...
In this paper, we propose a radio frequency lateral double diffused metal oxide semiconductor device with part of stepped buried oxide layer, and establish a model of the surface electric field of the device. From the simulation results, it is concluded that the surface electric field distribution model is basically consistent with the simulation results, and the new peak electric field is obtained...
Inspired by the computing architecture of human brain, neuromorphic computing promises massively parallel, energy efficient and fault tolerant computation compared with conventional von Neumann approaches. In order to achieve this ambitious goal, one of the crucial tasks is to make devices that can emulate the functions of biological synapses at the physical level. Here we fabricated a novel Pt/TaOx/Ta...
A fully integrated, reconfigurable step-up DC-DC switched-capacitor power supply solution for energy harvesting system is presented in this paper. A new series-parallel architecture of step-up switched-capacitor converter with Pulse Skip Modulation (PSM) is proposed. This converter generates a stable regulated output (1.2V) from an ultra-low input voltage of 0.3V–1.2V. The designed converter achieves...
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