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In this paper, the short-circuit robustness of a normally-off GaN HEMT is investigated in relation to applied bias conditions and pulse duration. The results align with previous studies on normally-on devices in highlighting an electrical type of failure. Here, however, the relevance of the specific gate-drive circuit design and corresponding device operational conditions is demonstrated. A gate-bias...
Atomic layer deposited Al2O3 is an industry-accepted gate dielectric used in the AlGaN/GaN MIS-HEMT structure, but direct deposition of Al2O3 on AlGaN/GaN will lead to the formation of detrimental Ga-O bonds, resulting in high-density interface traps. In this work, alternate AIN incorporation in Al2O3 to form AINO nano-films is proposed to suppress the gate leakage current and reduce interface trap...
We have demonstrated hysteresis-free recessed gate AlGaN/GaN metal-oxide-semiconductor heterojunction field-effect transistor (MOS-HFET) by implementing AIGN gate insulator and selective AlGaN regrowth technique. High thermal stability and excellent electrical properties of AIGN gate dielectrics will provide a large process window for further optimization of AlGaN/GaN MOS-HFET.
In this paper, the switching performance of monolithically integrated Si-GaN cascoded rectifiers is presented. The reverse recovery charge of the cascoded rectifier is 86.2% less than that of a Si fast recovery diode (FRD), which reveals great potential of cascoded rectifiers for high-speed power switching applications. Moreover, the double pulse tests are carried out for the cascoded rectifiers formed...
Vertical leakage in lateral GaN devices has a significant contribution to the overall off-state current at high blocking voltages and high temperatures. It could could lead to premature breakdown before avalanche or dielectric breakdown occur. This paper identifies via experimental results and TCAD simulations the main physical mechanisms responsible for the vertical leakage through the epi and transition...
In this work, we investigated the current collapse mechanism of AlGaN/GaN high-electron mobility transistors (HEMTs) with LPCVD Si3N4 passivation. With newly developed fast soft-switched current-DLTS techniques, we achieved current acquisition within 100 ns after each stress pulse and with high sampling rate up to 5 MSa/s. A single trap level (∼66 meV) and capture cross section On (−1.05×10−20 cm−2...
Dynamic ON-resistance (äon) behaviors of 600-V GaN-on-Si lateral power devices with grounded and floating substrate termination are studied. It is found that the floating substrate termination not only enables higher OFF-state breakdown voltage, but also delivers the benefit of smaller dynamic Ron degradation under higher drain bias (> 400 V) switching operations. Under medium drain bias (<...
This paper describes a novel SiC trench MOSFET concept. The device is designed to balance low conduction losses with Si-IGBT like reliability. Basic features of the static and dynamic performance as well as short circuit capability of the 45mΩ/1200 V CoolSiC™ MOSFET are presented. The favorable temperature behavior of the on-state resistance combined with a low sensitivity of the switching energies...
An approach to implement electrically robust MOSFETs in a functioning half-bridge will be investigated. For the first time, reverse conducting 3.3kV SiC MOSFETs have been fabricated with dilferent cell pitches from 14μm (p1.0) to 26μm (pl.8) that are able to withstand short circuit pulse of up to 10μs and a 9ms surge current event up to 15x the nominal current. LinPak half-bridge modules have been...
Advanced metal/high-k gate stack technology for SiC-based power MOSFET was demonstrated. We found that the Hf incorporation into aluminum oxynitride (HfAlON gate insulator) combined with TIN electrode effectively improves the stability of threshold voltage under both negative and positive bias temperature stresses. Since the relative permittivity of HfAlON increases with increasing Hf content, peak...
In this work, we report results for the 3 lot, 77 device-per-lot high temperature-reverse bias (HTRB) test, as well as work on gate oxide reliability for 3.3 kV devices in relation to the presence of material defects. The work indicates that large scale reliable operation of 3.3 kV 4H-SIC MOSFETs is achievable using conventional 4H-SiC device processing techniques and DMOS device structures, despite...
Due to their high power density and high temperature capabilities, Silicon Carbide MOSFETs are promising power semiconductor switches to improve efficiency and reduce system size for many industrial applications like traction drives and grid-tied renewable energy conversion. The adoption of SiC MOSFETs in these areas has been slowed by its high cost and the poor short-circuit robustness. In this report,...
A holistic approach taking benefit from optimization of chip, assembly technology and module design was utilized to exploit the performance potential of SiC power modules. A novel MOSFET SiC module (1200V, 400A) with extremely low inductance (1.4nH) was designed and assembled using Semikron DPD (Direct Pressed Die) technology. The electrical measurements showed excellent switching performance (switching...
In this study, sintered Cu is shown to have superior reliability to that of sintered Ag, in a high-temperature thermal cycle test up to 200°C and superior power cycle durability at a maximum junction temperature of 175°C. A 1700 V low-stray-inductance dual module made with sintered Cu and a leading-edge side-gate HiGT (High-conductivity IGBT) is also shown to have high power density with low loss...
This paper proposes a new power module concept that integrates output current measurement function to make inverters compact. The current measurement function is realized by tiny printed-circuit-board (PCB) Rogowski coils. The PCB Rogowski coil picks up a switching current flowing through an IGBT chip, and then a combination of a digital circuit based on a field-programmable-gate-array (FPGA) and...
A new gate driver IC in SOI technology is presented which integrates all primary and secondary side driver functions for a three-phase MOSFET power inverter system and with brake chopper on a single chip. Thanks to the used SOI technology which blocks voltages in both directions an unique property of the IC is the potential separation for each secondary side thus allowing a decoupling from the primary...
In this paper, an IGBT gate driver IC with a collector current sensing circuit and an on-chip CPU for digital control is presented. The IC is fabricated using TSMC's 0.18 μm BCD Gen-2 process. This technique is based on the unique Miller plateau relationship between the gate current and collector current (Ig and IC) for a particular gate resistance (Rg), and allows for a cycle by cycle measurement...
A novel lateral double-diffused MOSFET (LDMOS) is proposed with the assisted deplete-substrate layer (ADSL) under the drain electrode for the first time in this letter. Since the introduced layer could assist deplete the substrate, both the lateral and the vertical electric field distributions would be improved resulting from the electric field modulation effect, the breakdown characteristic is significantly...
In this paper, a novel superjunction lateral double-diffused MOSFET (SJ-LDMOS) based on the bulk electric field modulation is proposed. The new structure is characterized by adding the multiple floating buried layers (MFBL) into the substrate/epitaxial layer. In this way, the high bulk electric field under the drain diffusion edge is reduced and the overall bulk electric field distribution is optimized...
A new high-voltage integrated circuit (HVIC) technology has been developed and optimized for AC/DC power conversion applications that require increased digital content. This cost-effective process uses 3.3V CMOS and a 180nm backend process to provide about 10X greater digital circuit density compared to conventional 0.5um 5V CMOS solutions. Excellent analog circuit performance is maintained. For the...
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