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Stochastic computing (SC) encodes data in the signal probabilities associated with pseudo-random bit-streams. It enables very low-area and low-power arithmetic operations using standard VLSI circuits, it is also highly error-tolerant. While addition, subtraction and multiplication have extremely simple SC implementations, this is not true for division. Known stochastic dividers employ sequential logic...
This paper proposes the design of an adaptive filterin stochastic circuits. The proposed circuit requires lower areaand power than a conventional stochastic implementation. In theproposed design, the stochastic multiplier is implemented by anXNOR gate, as in a conventional scheme. However, the stochasticadder based on a multiplexer is not a very efficient implementationdue to the three required stochastic...
Finite impulse response (FIR) filter is the basic functional component in various signal processing and communication systems. In many practical applications that have stringent requirement on spectrum, long FIR filters are needed to achieve the desired filtering performance. However, because a T-tap FIR filter requires T copies of high-complexity multiplier, the conventional design of long FIR filter...
Imprecise adders are implemented to improve the performance and power consumption of arithmetic circuits with forgivable inaccurate results. These types of designs are extensively used in digital computer systems for approximate computing. One of the challenges in designing imprecise adders is evaluation of output quality. Currently, the most popular technique to evaluate the approximate designs are...
The paper describes a method of verifying sequential arithmetic circuits by adding a special type of redundancy, called "Vanishing Polynomials" and "Don't Care Polynomials". The proof of functional correctness consists in transforming the polynomial expression at the primary outputs into a unique polynomial in the primary inputs and comparing the computed...
This paper proposed an approximate adder to accelerate computation and reduce energy consumption for error-resilient applications with a moderate output quality losses. The computation acceleration comes from the predictionscheme for the adder circuit, where the critical path is divided into multiple short fragments and a paralleling addition progress is enabled. The energy consumption is reduced...
In this study, we propose a method to overcome the main drawback in stochastic computing, low accuracy or related long computing times. Our method exploits dependency in stochastic bit streams with the aid of feedback mechanisms. Accurate (error-free) arithmetic multiplier and adder circuits are implemented. Operations are performed using both stochastic and binary inputs/outputs, binary-stochastic...
This paper presents an area efficient architecturefor quadruple precision division arithmetic on the FPGAplatform. Many application demands for the higher precisioncomputation (like quadruple precision) than the single anddouble precision. Division is an important arithmetic, butrequires a huge amount of hardware resources with increasingprecision, for a complete hardware implementation. So, thispaper...
Approximate computing techniques have paved new paths to get substantial improvement in speed and power efficiency by making a trade-off with the accuracy of computations in inherently error tolerant applications, like from image and video processing domains. The accuracy requirements of various applications can differ from each other. Even within a same application different computationscan have...
Shift-add/subtract circuits constitute the basic building blocks of several frequently used complex arithmetic units such as multiple constant multipliers, exponentiation circuits, fast division circuits, CORDIC rotators, logarithmic and residue number conversation units, etc. Fine-grained pipelined designs of these arithmetic units have strong potential to improve the power-performance-reliability...
Ferroelectric FETs (FEFETs) are emerging devices with potential for low power applications. The unique feature which makes these devices suitable for ultra-low voltage operation is the steep slope achieved by negative capacitance of the ferroelectric oxide based gate stack. This property is being actively explored to overcome the fundamental 60 mV/decade sub threshold swing limit associated with conventional...
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