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This paper presents a 0.325-THz single-ended amplifier designed in a 28-nm FDSOI CMOS technology. The amplifier consists of four common-source gain stages and utilizes staggered-tuning along with inductive feedback (drain to gate) technique to boost up the gain over a wide frequency band. Having a total power consumption of 28 mW, the amplifier achieves a peak gain of 4.5 dB at 325 GHz. To the best...
A wide-locking range divide-by-4 static frequency divider for the mm-wave wireless applications is proposed. The capacitive-bridged inductive shunt peaking technique is investigated for widening the locking range and a compact layout area. The divider is realized in 65nm LP CMOS with a small area of 100μm × 160μm occupied. Measurement results show the present divider achieves an operation range percentage...
This paper presents the design and measurement results of a W-band two-stage differential amplifier using transformers in 28-nm CMOS FDSOI. At 90 GHz, the amplifier achieves 13.8 dB gain, and the input and output return loss are −8.0 dB and −11 dB, repectively. The amplifier obtains +5 dBm saturated output power and 1-dB output compression point of 0 dBm at the centre frequency. From 85 to 95 GHz,...
This paper presents a 124 to 184 GHz single-ended amplifier designed in 28-nm FDSOI CMOS technology. The amplifier consists of four common-source gain stages and broadband matching networks for input, output and inter-stage matching employing slow-wave shielded co-planar waveguides. Having a total power consumption of 31 mW, the amplifier achieves a peak gain of 10.1 dB at 167 GHz and a 3-dB bandwidth...
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