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During standard robustness evaluations of a NPC type 2 IGBT power module a non-described effect in a Three Level NPC 2 topology was observed. A full description of that effect can help to protect IGBT power modules in this topology against blow ups and can help in a post mortem analysis to understand the reason for this. With a full understanding of that effect the lifetime of the inverter can be...
Commercially available Silicon Carbide (SiC) MOSFET power modules often have a design based on existing packages previously used for silicon insulated-gate bipolar transistors. However, these packages are not optimized to take advantage of the SiC benefits, such as, high switching speeds and high-temperature operation. The package of a half-bridge SiC MOSFET module has been modeled and the parasitic...
This paper presents a three-phase transformerless uninterruptible power supply (UPS) with sinusoidal pulse width modulation (SPWM) based division-summation (D-Σ) digital control. A transformerless UPS controls the power flow between dc link and utility grid, as well as tracks the ac reference voltage. The proposed control law derived with D-Σ digital approach takes into account the effects of dc-link...
This paper presents a high accuracy and high bandwidth current sense circuit for digitally controlled DC-DC buck converters. The circuit uses lossless inductor DCR current sensing and a sigma delta modulator ADC to sense the average current in the inductor to high accuracy. These accurate but low bandwidth measurements are unsuitable for use in feedback control loops as their acquisition delay would...
In multiphase buck converters, phases are dynamically added or dropped based on the output load, to improve efficiency. This is typically achieved by programming a lookup table containing the range of threshold currents for each phase, independent of input voltage and switching frequency. In this work, an algorithm is proposed to recalibrate the threshold currents for operation at optimum number of...
This paper presents a novel approach to compensate the voltage error due to switching dead times in voltage-fed inverters using a field-programmable gate array (FPGA) and current oversampling. The FPGA controls an analog-to-digital (AD) converter which operates at a high conversion rate and processes numerous current samples taken at equidistant time steps within each pulse width modulation (PWM)...
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