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Noise canceling techniques have been successfully applied to the design of modern multi-band RF-CMOS inductor-less receivers. However, low voltage supply requirements are imposing new design challenges which are pushing the operation of the MOS transistor into moderate or weak inversion, making the setup of closed sizing expressions a difficult task. This paper presents a Si2 OpenAccess based circuit...
VeSTIC (Vertical-Slit Transistor based Integrated Circuit) architecture enables easy integration of all types of transistors on the same chip. One of the elements available in this technology is Junction Vertical-Slit Field-Effect Transistor (JVeSFET). Simulation based feasibility studies indicate that the device exhibit attractive electrical properties like DC characteristics of relatively low subthreshold...
In the present paper, a generalized SPICE simulation model of photovoltaic modules is developed, valid for operating conditions of solar irradiance and temperature different from nominal conditions. An extraction procedure for model parameter determination is proposed using datasheet characteristics of the modules. In order to improve the model accuracy, the values of the voltage Vmp and the current...
The paper describes methodology for modelling and simulative estimation of sensitivity and range of ISM band Remote Keyless Entry transmitter-receiver system for automotive applications. The method is based on electrical simulation including PCB extraction data and parameters statistical distribution to evaluate best- and worst case scenarios. Both transmitter and receiver circuits are considered,...
High voltage CMOS active devices inherently have a parasitic vertical bipolar transistor. The parasitic PNP structure can be activated during high-power switching operation causing a potential shift of the substrate. In this work a spice-modeling approach based on transistor layout is presented that is compatible with parasitic substrate noise propagation in Smart Power ICs. The results of the model...
This paper presents multi-objective optimization of a front-end electronics implemented in multichannel integrated circuit for silicon sensors readout in the Silicon Tracking System in the CBM experiment at the FAIR center. We present the optimization towards low-power (< 8 mW/channel) and low-noise while keeping the channel pitch of 58 μm and minimum number of external components required for...
In this paper, we provide a detailed analysis on the power consumption of two-stage pipeline successive approximation analog-to-digital converter (SAR ADC) and also show the relationship between stage resolution and the total power consumption in 65 nm technology. Thereafter, we evaluate the analysis results with designing a 15-bit pipeline SAR ADC in 65 nm technology and also a power comparison between...
When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a spice-based approach to characterize electrical key parameters of a passive protection directly within standard IC design flow avoiding time consuming TCAD simulations. Our methodology consists...
In this paper, it is shown that a description of mildly nonlinear circuits with an operator o introduced in a paper entitled “Distortion in variable-capacitance diodes” by R. G. Meyer and M. L. Stephens is not correct. The error occurring in this article was then replicated in publications of Palumbo and Pennisi on harmonic distortion calculation in integrated CMOS amplifiers, and recently in a paper...
This paper analyzes some advantages of Silicon-on-Insulator (SOI) based photodetectors for bioluminescence imaging. It shows that SOI based sensors not only solve the bulk carriers problem, it can also act as a very selective spectral filter by acting as a resonant cavity, which is useful in application with a very narrow spectrum of interest, such as bioluminescence imaging. Then, the authors discuss...
Flexible capacitors were made using stainless steel yarns as yarn electrodes on textile substrate. The electrolyte material used was a dispersion of polyethylene dioxythiophene (PEDOT) : polystyrene sulphonate (PSS). After charging the capacitor for sufficient time, a sharp voltage drop was observed initially for a few seconds, then the voltage discharge slows down. It was not easy to establish the...
This paper proposes the evolutionary technique of the stimulus signal optimization for the analog electronic circuit testing purpose. The obtained signal is coded with Sigma-Delta modulation usage that allows to generate it easily by simple microcontrollers without the necessity of expensive D/A peripherals applying. The signal with the controlled impulses density may be obtained on the external output...
This paper introduces some design and measurement techniques that were used in the design and the testing of an ASIC for ultra-low current sensing. The idea behind this paper is to present the limitations in sub-picoampere current measurements and demonstrate an ASIC that can accurately measure the different sources of leakage currents and the methodology of measuring. Then the leakage current can...
The paper presents a highly efficient system for automated wafer testing implemented on a single software platform. Building fully functional device requires often expensive and time consuming, manufacturing steps. Thus, the ASICs on the wafer ought to be tested in advance to ensure that only the chips with no manufacturing defects will be used in the further process. The presented testing system...
This article presents an application of the Bayesian networks (BN) to reliability analysis. First part of the article describes BN used to construct simple nodes, second shows the methodology used in constructing models of complex systems. A combination of path analysis with the Bayesian networks to enhance the construction of the latter is also presented. There are three examples of complex systems...
This paper presents a class-D power amplifier for medium quality sound systems using a second-order passive sigma-delta modulator (ΣΔM). The ΣΔM controls an output power stage consisting of a H-bridge. The loop filter of the ΣΔM was designed using a optimization procedure based on genetic algorithm (GA), that takes into account several parameters. This system was implemented using discrete components...
Among the numerous solutions developed to improve the handling capability of superjunction power devices, the Deep Trench Termination (DT2) is the most adapted thanks to its lower cost and size compared to other technologies using the multiple epitaxy technique, and an easier implementation in the fabrication process. This paper presents the optimization of the Deep Trench Termination by means of...
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