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In this paper, we study the effect of using digitally controlled impedance IO Standard in memory interface design in terms of power consumption. In this work, we achieved 50% dynamic power reduction at 1.5V output driver voltage, 35.2% dynamic power reduction at 1.8V output driver voltage in comparison to 2.5V output driver voltage in DCI based IO standard implementation on input or output port in...
Mobile Telecommunication applications have seen, in the last years, a remarkable increase in the number of installations and consequently there has been a relevant growth of energy consumptions. This is due to an ever-growing interest about new and reliable services in mobility calls with an increase of the BTS operational hours and traffic management, in order to guarantee the quality of the service...
In this work, our focus is on study and analysis of various clock gating technique and design and analysis of clock gating based low power sequential circuit at RTL level. Virtex-6 is 40-nm FPGA, on which we implement our circuit to re-assure power reduction in sequential circuit. Clock gating is implemented on smaller circuit called D flip-flop and on larger circuit called 16-bit register. The percentage...
The growing popularity of smartphones and tablets has highlighted several research issues. In this paper we focus on minimizing energy expenditure of Android devices. The energy dissipated by exotic hardware is explained in detail. The software development practices that result in high power consumption are also described. An application “Power Monitor” is developed to understand the usage pattern...
In this paper we examine the effect of relay (R) placement on the energy efficiency of a wireless sensor network (WSN) operating over a η-μ fading channel. We consider η-μ statistics for modeling the small scale fading affected wireless channel between the sensor nodes. The η-μ model is quite general in nature and it encompasses other popular fading models such as Rayleigh, Nakagami etc. In order...
Domino CMOS logic circuits are widely used these days in the design of high-performance modules in modern day integrated chips and microprocessors. The feature of high speed and less area overhead of these logic circuits compared to other logic styles make them a popular choice in the design of high speed circuits. As power consumption is directly proportional to the dynamic node capacitance, a new...
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