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This paper presents theoretical analysis of the maximum operating frequency of proposed Source Degeneration (SD) and Conventional D-flip flops are estimated. The approach is based on the voltage transfer function, which is derived from small signal model of the circuit. Design approach with pre and post layout simulation results have been presented in detail and compared the performance in terms of...
This paper presents a bandgap reference without use of native MOS transistor (low threshold voltage (Vth) devices), designed in 0.18 µm CMOS technology with a supply voltage of 1 V consuming 47 µW at room temperature. It generates a reference voltage of 540 mV and has a temperature coefficient of 220 ppm / °C from −40 °C to 125 °C.
As domino logic design offers smaller area and higher speed than complementary CMOS design, it has been very commonly used for high-performance processors; however, the average power consumption of the domino circuits is larger than that of the static circuit. This power dissipation problem needs to be solved for the domino circuits. The power consumption of conventional CMOS circuits is composed...
In the literature, voltage mode and current mode multiplexers are used for differential on-chip global interconnect transmitters. Conventionally, the Pseudo-NMOS multiplexer used in voltage mode transmitters consumes more power and has less bandwidth, whereas the current mode multiplexers operate at higher speeds at the cost of increase in power consumption. In this paper, a novel domino logic based...
High speed, low power SRAMs have become a critical component of many VLSI chips. This is especially true for microprocessors, where the on-chip cache sizes are growing with each generation to bridge the increasing divergence in the speeds of the processor and the main memory. Simultaneously, power dissipation has become an important consideration. A 64x#x00D7;64 SRAM memory system is designed, implemented...
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