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This paper presents a systematic study of the effect of source/drain (S/D) implant lateral straggle on the RF performance of the symmetric and asymmetric underlap double gate (UDG) MOSFET devices. The length of the underlap regions (L\({}_{un}\) ) on each side of the gate is a critical technology parameter in determining the performance of UDG-MOSFETs. However, the value of L\({}_{un}\) is susceptible...
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