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This article describes a two-dimensional, quadrature, sinusoidal type signal correction. Such signals are widely popular e.g. in motor control, laser interferometry and sensors applications. It is proved that in some situations it is necessary to improve the quality of the signals in order to obtain the required parameters. We show that the optimum solution is a combination of hardware and software...
Ring Imaging Cherenkov detectors (RICH) are a class of particle detectors used for particle identification whose principle involves a pattern recognition problem: identifying circles from a short number of their points. A real image hosts several circles which may eventually overlap. Actual techniques solving this problem are mainly non-local algorithms implemented on software requiring large computing...
Computing Euclidean Distances is a very important operation in digital communication, especially in the case of trellis coded modulation, where it is used numerously. This paper shows that a substantial reduction in complexity can be achieved in hardware processing elements for computing Euclidean Distances. A reduction in complexity down to 39% is shown compared to traditional designs. The paper...
In this paper, experimental verification of CNN-based nonautonomous MLC system designed as chaos generator is presented by using programmable and reconfigurable IC technique. The hardware implementation uses FPAA (Field Programmable Analog Array)-based reconfigurable design methodology. FPAA is a programmable IC and a rich variety of systems including analog functions can be realized via dynamic reconfiguration...
Matrix inversion is sensitive towards the number representation used. In this paper simulations of matrix inversion with numbers represented in the fixed-point and logarithmic number systems (LNS) are presented. A software framework has been implemented to allow extensive simulation of finite wordlength matrix inversion. Six different algorithms have been used and results on matrix condition number,...
This paper shows a novel methodology to reduce the power consumption and complexity in unrolled CORDIC architectures. It is a methodology based on removing adder and subtractor stages starting from the first stage. The stages are replaced with a number of MUXes. Three to four stages can be removed with substantial reduction in complexity and power consumption. The methodology is applicable on CORDICs...
High performance implementations of unary functions are important in many applications e.g. in the wireless communication area. This paper shows the development and VLSI implementation of unary functions like the logarithmic and exponential function, by using a novel approximation methodology based on parabolic synthesis, which is compared to the well known CORDIC algorithm. Both designs are synthesized...
The paper presents a package of arithmetic operation synthesis dedicated to reconfigurable logic controllers programmed according to IEC1131 and EN61131. The program is compiled to hardware structure with a massive parallel processing. The developed method automatically allocates resources and operations. It controls resource usage and operation timing. Using mixed concept of operation allocation...
The size and performance of a system LSI depend heavily on the architecture which is chosen. As a result, the architecture design phase is one of the most important steps in the system LSI development process and is critical to the commercial success of a device. In this paper, we propose a C-based system LSI design methodology and apply it to the design of of a software and hardware system based...
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