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GAM, TPN and AWE methods have been accepted by many researchers as methods of modeling on-chip interconnects as RC, and RLC circuits. In this paper a platform to generate the T and Π configurations for RC, RLC and RLCG models based on GAM, TPN and AWE methods is proposed. With the Π configuration of AWE-based RLC model provides the best performance, this model has been mapped to an equivalent simple...
This paper presents incremental conductance method for maximum power point tracking (MPPT) using DC-DC cuk converter. Comprehensive analysis and simulation of KC85T solar module and equivalent electric circuit are provided while effects of various environmental conditions on the PV module behavior is investigated. In order to fully understand the PV module working specifications fundamental characteristics...
A mode-matching approach is presented for the analysis of substrate-integrated waveguide (SIW) circuits. The numerical technique takes advantage of recently developed fabrication techniques employing rectangular-shaped via holes. Discontinuity models involving all-dielectric waveguides and sections with arbitrary numbers of vias are presented and combined into a powerful analysis tool which can be...
In this paper, performance and accuracy of both General Geometric Programming (GGP) and non-linear programming (NLP) algorithms, for optimization of low power VLSI circuits, have been studied and compared. An optimization procedure based on GGP and logical effort method has been proposed and employed for optimization of variety of sequential logic circuits. The results were compared to the NLP algorithm...
A recently introduced wave-based transient analysis uses relaxation and thus does not require large matrix decompositions at each nonlinear iteration. The use of waves results in guaranteed convergence for any linear passive circuit and some types of nonlinear circuits, but the convergence rate can not be controlled. In this work, the wave-based transient analysis is re-formulated using a block Newton-Jacobi...
In this paper, the effect of network type in modeling I-V characteristic of MOS transistors was studied. Neural networks training data are generated in Hspice environment for MOSFET BSIM3 with TSMC-0.18 technology. Training was performed in MATLAB environment while testing was done in Hspice as well. Also in this work, feature selection using UTA method is utilized for determining consistency of BSIM3...
This paper presents an efficient model order reduction algorithm for simulating large Partial Element Equivalent Circuit (PEEC) networks with many nonlinear elements. The proposed methodology is based on a multidimensional subspace method and uses constraint equations to link the nonlinear elements and biasing sources to the reduced order model. This approach significantly improves the simulation...
To accurately model the deep-rotor-bar phenomena in squirrel-cage induction machines for a wide range of frequencies, the distributed rotor may be generally represented as a high-order transfer function or an equivalent lumped-parameter ladder network. However, when lower-frequency electromechanical transients are of interest, an effective reduced-order model, in which a single-branch rotor resistance...
A monolithic DC-DC boost converter with current-mode hysteretic control is designed and simulated in 0.18-μm CMOS technology. The system is simple, robust, and has a fast response to external changes. It does not require an external clock, and the output is regulated by voltage feedback in addition to limiting the inductor current by sensing it. A non-overlapping clock is internally generated to drive...
Power supply noise has become an increasing concern for circuit designers with the recent advances in technology. As a result there has been an introduction of active supply noise mitigation circuits in addition to the currently used passive bypass/decoupling capacitors for on-chip noise suppression. This paper proposes figures of merit for characterizing the various emerging mitigation circuits as...
Signal integrity degradation at high frequencies affects test results and increases the yield loss of integrated circuits. Parasitic effects and electromagnetic coupling due to transmission lines degrade the integrity of test signals and undermine the accuracy of the measurement results. A new signal integrity enhancement technique is presented in this paper to compensate the signal loss. A Proportional-Integrator-Differentiator...
This article presents a new multiphysics modelling approach for cell manipulation by dielectrophoresis. This approach is proposed to model and predict the behavior of particles injected into a microchannel due to the application of an electrical field. The objective of this model is to better characterize microelectronic circuits dedicated to design and implement hybrid systems such as lab-on-chips...
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