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The design of a Pulse width modulation for class D audio power amplifier in CMOS 0.18um Process with high efficiency is presented. The efficiency, the power supply voltage range with 1.8–3.3V, the PSRR, the THD and THD+N makes this design usable to various kinds of small and medium power audio amplification system such as DVD, LCD-TV, MP4 and wireless phones
An adaptation of the Ant Colony Optimization technique to the optimal sizing of analog circuits is presented. Details of the developed algorithm are given in the following. An application to the optimal sizing of CMOS inverted second generation current conveyors is presented, and comparison results with published works are highlighted. SPICE simulation results are given to show the viability of the...
For CMOS-based nanometer technology, leakage power dissipation became an important issue in low power design. An approach to deal with this problem for timing constrained digital designs is to use dual threshold voltages. A low threshold voltage is used for computational elements on critical paths to satisfy timings, while a high threshold voltage can be used for the other elements off critical paths...
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