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Switched capacitor techniques are very popular for implementation of Mixed Signal blocks in CMOS VLSI. Non-Overlapping Clock (NOC) generator is one of the key blocks in the implementation of switched capacitor circuits. Standard NOC generator circuits available in the literature uses delay circuits realized using simple inverters connected in a chain. For moderate frequencies, the number of inverters...
In this paper ultra low power characteristics of the newly proposed energy efficient adiabatic Logic (EEAL) is investigated. EEAL is based on differential cascode voltage swing (DCVS) logic, uses only a single sinusoidal source as supply-clock. With minimal clocking overhead this proposed logic eliminates the floating output problem and enhances the energy efficiency significantly. An EEAL based 8×8...
Vedic Mathematics is the ancient methodology of Indian mathematics which has a unique technique of calculations based on 16 Sutras (Formulae). A high speed complex multiplier design (ASIC) using Vedic Mathematics is presented in this paper. The idea for designing the multiplier and adder/sub-tractor unit is adopted from ancient Indian mathematics “Vedas”. On account of those formulas, the partial...
Nanowire MOSFETs have been recognized as one of the possible choices to continue the scaling of CMOS beyond conventional scaling limits. In present study we study various aspects of device characteristics and Mixedmode circuit behavior of Silicon and Germanium Nanowire MOSFETs. The various parameters determining the behavior of device in the analog/digital circuits is studied and compared for Nanowire...
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