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In this paper a new approach for converting nano-scale mechanical energy into electric energy by piezoelectric zinc oxide nanowire arrays is discussed. The operation mechanism of the nanogenerator relies on the piezoelectric potential created by an external strain; a dynamic straining of the nanowire results in a transient flow of the electrons in the external load due to the driving force of the...
We successfully achieved the reduction of the parasitic resistance and the mobility enhancement in Si nanowire transistors (NW Tr.) by raised source/drain extensions with thin spacer (<;10nm) and by stress induced from heavily-doped gate. Id variations are suppressed by the spacer thinning. By adopting <;100> NW channel instead of <;110> NW, Ion = 1 mA/μm for Ioff = 100 nA/μm is achieved...
Power management and high speed transceiver I/O demands are two major challenges for advanced field programmable gate array (FPGA) at 28nm node. To meet requirements, not only innovations in process technology but also co-optimization of process, circuit and system architecture are required. Advanced process technologies, such as high-k metal gate (HKMG) and enhanced strain engineering, significantly...
The impact of a 60 MeV proton irradiation on the drain induced barrier lowering is investigated for tri-gate FinFETs processed with and without the implementation of different biaxial or uniaxial strain engineering techniques. A contrasting behavior is observed for n- and pFinFETs, which may be associated with the radiation-induced charges in the buried oxide and the influence of the back channel...
Using theoretical calculations, we explain why some metal atoms like Ni produce bulk silicides and the others such as Au never produce silicides, why silicides with some stoichiometry are difficult to grow on Si substrate, why Schottky barrier for electrons simply decreases as the Si ratio in silicides increases, and how the dopants change Schottky barrier. It is shown that the keys to answer these...
We have investigated the growth and crystalline properties of tensile-strained Ge and Ge1-xSnx heteroepitaxial layers for high-mobility channels. The low temperature growth and the large misfit strain between Ge1-xSnx and Si leads to the high density of defects such as vacancy in Ge1-xSnx layers. They effectively enhance the propagation of misfit dislocations and the strain relaxation with suppressing...
In this work, two kinds of thermal annealing methods were used to process the silicon wafer by Ge ion bombardment in two steps, dose of 7×1016/cm2 with 150KeV and dose of 2.72×1016/cm2 with 50KeV respectively. In order to control the defects density and Ge distribution in SiGe layer, furnace annealing (FA) and rapid thermal annealing (RTA) schedules were used. It has been found that the FA after ion...
Ultrathin (11 nm) strained SiGe-on-insulator (SGOI) with a Ge fraction of 0.5 was fabricated by Ge condensation technique. The residual compressive strain as high as 1.72% was achieved in SGOI layer by reducing the initial thickness of as-grown Si0.93Ge0.07 layer. Strained-SGOI pMOSFET exhibits a hole mobility of 3 times higher than that of Si-on-insulator pMOSFET.
Silicon-germanium dots grown in the Stranski-Krastanow mode are investigated as sources of strain for electron mobility enhancement in the silicon capping layer. N-channel MOSFETs with the channel in the Si cap-layer over the SiGe dot (DotFETs) are fabricated in a custom-made process and have an average increase in drain current of up to 22.5% compared to the reference devices. The sources of device...
Two topics are introduced from our studies on the formation mechanisms of nanochannels: thermal silicon oxidation to form silicon wire channels, and silicon-carbide thermal decomposition to form atomically thin graphene channels. Silicon emission and oxide viscous flow processes are necessary to explain thermal oxidation to form silicon nanochannels. Interfacial growth should be considered for the...
The concept of a bandgap is so deeply ingrained that it is hard to imagine an integrated circuit built on graphene, whose pristine state is a gapless material with charge carriers obeying the relativistic Dirac spectrum, analogous to light. Entertaining such notion is so appalling that many have proposed to cut graphene into bits and pieces, thinking that size quantization effect would recover a bandgap...
We have developed new microdiffraction system at the SPring-8. This system used a focused beam produced using a phase zone plate combined with a narrow slit, which made a focused beam with a small size and a small angular divergence. Furthermore we can use the two-dimensional x-ray CCD detector, which enable us to measure local reciprocal space maps at many points in a sample, that is, the distribution...
The concept of atomically controlled processing for group IV semiconductors is shown based on atomicorder surface reaction control in Si-based CVD epitaxial growth. Si epitaxial growth on B or P atomic layer formed on Si(100) or Si1-xGex (100) surfaces, is achieved at temperatures below 500°C. B doping dose of about 7× 1014 cm-2 is confined within an about 1 nm thick region, but the sheet carrier...
By utilizing an electron-cyclotron-resonance plasma enhanced chemical vapor deposition (CVD) for low-temperature epitaxial growth of group IV semiconductors, atomically controlled plasma processing has been developed to achieve atomic-layer doping and heterostructure formation with nanometer-order thickness control as well as smooth and abrupt interfaces. In this paper, recent typical achievements...
Due to extreme miniaturization of device dimensions the well established TCAD tools are pushed to the limits of their applicability. Since conventional MOSFETs are already operating in the sub-100 nm range, new physical effects and principles begin to determine the transport characteristics and the validity of conventional current transport models is in question. The classical drift-diffusion model...
Variability from different sources such as layout-dependent effects due to strain has been a main obstacle against aggressive design rules and reducing corner margins in 32nm node and beyond. This paper reports and demonstrates a model development and verification platform to accurately address layout dependences due to strain. This platform has been successfully used in real design exercises at 40nm...
A study on the effect of curvature of triangular shaped cantilevers in MEMS sensors was presented. 3-D models were performed by using the SolidWorks software. And modal analysis and harmonic response analysis were carried out on different types of geometrically configured triangular shaped cantilevers using ANSYS software. The results included the variation of natural frequencies of cantilevers and...
For NMOSFETs with tensile stress liner, the contact position and the neighboring gates affect the mechanical stress distribution in the device. The effects of symmetrical and asymmetrical layout on 22nm NMOSFETs are studied, and the performance of the device is compared.
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