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The following topics are dealt with: GaN power amplifiers; SiGe HBT; nitride devices; millimetre-wave front-end solutions; nonlinear modelling; CAD; high-speed IC; millimetre-wave IC; wide bandgap device; MMIC active device modelling; power device technology; high frequency mixing solutions; SiGe microwave IC; frequency converters; frequency multipliers; EM MMIC device modelling; III-V technology;...
A single-chip low-noise fractional-N PLL with 40 percent tuning range is presented. The design employs two integrated VCOs controlled by three digital and two analog signals. The synthesizer is based on a dual-loop configuration. It is tuneable from 8.1 GHz to 12.4 GHz and features an f/2 output. In integer mode phase noise is below -100 dBc/Hz at all frequency offsets larger than 10 kHz. In fractional...
This paper presents a monolithically integrated clock and data recovery (CDR) circuit with 1:2 demultiplexer (DEMUX), which is capable of processing signals with data rates between 107 Gbit/s and 112 Gbit/s. The fabrication of the integrated circuit (IC) relies on an in-house InP double heterostructure bipolar transistor technology (DHBT) featuring cut-off frequency values of more than 350 GHz for...
This paper discusses the importance of chip-level EM-simulations required at millimetre wave frequencies for achieving correct results. The negative impact of interconnects on passive structures and the inability of the conventional RC-extraction to cater their effects necessitate alternative solutions. Furthermore during IC-measurements the number of probing points is limited; therefore chip-level...
An LC VCO with a new varactorless frequency tuning technique is presented, which is suitable for microwave and millimetre-wave applications. The continuous frequency tuning with a small output power variation is achieved using tunable negative inductance and negative capacitance cells. Fabricated in a 0.35-μm SiGe BiCMOS process, the varactorless VCOs achieves a continuous tuning range of 15% from...
This paper presents a fractional N frequency synthesizer which covers WLAN and WiMAX frequencies on a single chip. The synthesizer is fully integrated in 0.35μm BiCMOS AMS technology except crystal oscillator. The synthesizer operates at four frequency bands (3.101-3.352GHz, 3.379-3.727GHz, 3.7-4.2GHz, 4.5-5.321GHz) to provide the specifications of 802.16 and 802.11 a/b/g/y. A single on-chip LC -...
An integrated differential common collector Colpitts VCO with a wide tuning range is presented in this paper. The circuit was designed and fabricated in the IHP Technologies SGB25V 250 nm SiGe:C BiCMOS process. It provides a superior low phase noise performance of -115 dBc/Hz covering the frequency range of 6.7 to 8.7 GHz for UWB pulsed frequency modulated secondary radar application. An additional...
A triple-band SiGe HBT differential VCO has been developed for the next generation multi-band and/or multi-mode wireless radios. It utilizes a reconfigurable multi-band resonator which is based on a dual-band resonator but can achieve a triple-band resonation by using a band-selective switch. The band-selective switch is comprised of a two-terminal SiGe HBT with base and collector short-circuited...
A high loaded Q resonator and harmonic output topology are both potent technique to realize a low phase noise oscillator. This paper proposes a low phase noise Voltage Controlled Oscillator (VCO) with harmonic output, using a dual-tapped microstrip resonator of the high loaded Q factor. The paper also shows a load circuit configuration to suppress the output of the fundamental oscillation. The output...
A low-phase-noise ring voltage-controlled oscillator (VCO) with subharmonic injection locking is presented. The ring VCO topology is designed to obtain not only an acceptable spurious level but also satisfactory phase-noise characteristics by enabling the use of short-pulse-width injection signals (83.3 ps). We also present the measurement results in the case of non-integral subharmonic locking such...
This paper proposes an ultra compact LC-VCO. Due to the speed-up of CMOS digital circuits, jitter of ring oscillators is becoming a critical problem. Even though a LC-VCO has a better phase noise, a layout size of on-chip inductor is a problem as a clock generator. Thus, the proposed LC-VCO consists of a very compact stacked-spiral inductor and active components placed beneath the inductor. The VCO...
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