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Microstrip transmission line (MS), coplanar waveguide transmission line (CPW), grounded coplanar waveguide transmission line (GCPW), slow-wave transmission line with slotted grounded shields (GSCPW), slow-wave transmission line with slotted floating shields (FSCPW) are widely used in the silicon technology. Because the quasi-TEM assumption is still valid in these structures, an equivalent circuit...
The large customer breadth of the Specialty Foundry is driving process technology and design enablement innovation that is hard to replicate within an integrated device manufacturer (IDM) which serves a more focused customer base. In this paper we will review Specialty Foundry technology in the areas of RF, high-performance analog, and power. We will also review novel design enablement tools available...
A time-domain methodology for noise analysis of non-linear dynamic integrated circuits with arbitrary excitations is presented. A non-stationary stochastic noise process is described as an Ito system of stochastic differential equations and a numerical solution for such a set of equations is found. Statistical simulation of specific circuits fabricated in 65 nm CMOS process shows that the proposed...
A laser-diode (LD) driver with interwoven mutually-coupled peaking inductors for high-speed optical networks is presented. Six and four inductors are interwoven into two sets of inductors for area-effective implementation as well as performance enhancement. The proposed circuit is fabricated in CMOS 0.18-μm process. The circuit area is 0.34mm2 and the maximum operating speed is 16Gbps. Compared to...
A new methodology to bridge package and silicon domain simulations is demonstrated using a new data file to facilitate stress information exchange. The flow integration uses equivalent stress conditions to replace sensitive process information and parameterized modules to minimize user interventions for 3D IC stress simulations.
A novel wideband 1-π equivalent circuit model for on-chip spiral inductors is presented. A substrate network, consisting of R/L/C, is proposed to model the broadband loss mechanisms in the silicon substrate. The skin and distributed effects for windings have been taken into account. A series of inductors with different geometries are fabricated in standard 0.18-μm 1P6M RF CMOS process to verify the...
This paper proposes an efficient method to predict the lifetime yield of analog circuits considering the joint effects of manufacturing process variations and parameter lifetime degradations. The method uses the idea of worst-case distance, which is an indicator of circuit robustness concerning process variations. The worst-case distance in circuit lifetime is predicted based on a new, quadratic prediction...
Transmission-line models for high-frequency wideband applications should preferably directly relate to the physical dimensions and effects. Various simulation modes (both linear and non-linear in the frequency- and time-domain) point towards the use of a straightforward model using frequency dependent resistances, inductances, and capacitances. However, not all simulators accept frequency dependent...
We describe the use of an electromagnetic (EM) simulator for modeling integrated RF components and circuits. Modern EM simulators are fast and accurate enough to provide good models of such components. An important aspect of advanced IC processes is that the physical properties of wires (width, thickness, and resistance) vary depending on the surrounding wiring. We discuss how the EMX simulator [1]...
In this review we present a technology-independent approach to the construction of a circuit model for a high-power radio-frequency (RF) LDMOS FET. We compare and contrast this approach with other MOSFET modeling approaches used for digital and RF CMOS applications. We describe the structure of our model, the mathematical development of the constitutive relations, and the functions used for their...
As CMOS scaling extends into the nanoscale regime, designers need to be aware that device behavior depends not only on traditional geometric parameters such as channel length and width, but also on layout implementation details of the device and its surrounding neighborhood. The advent of stress engineering, in which intentional mechanical stress is applied to improve device performance, also adds...
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