The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The use of a fully differential architecture has numerous advantages in a switched capacitor delta-sigma modulator, but the efficient use of such an architecture requires a completely symmetrical layout and routing, which may contradict with the requirements of component matching. A fully symmetrical placement, for example, requires division of the capacitor arrays and possibly placement of the two...
This paper presents a continuous-time quadrature bandpass sigma-delta (SigmaDelta) modulator with a chain of integrators with weighted capacitive feedforward summation (CICFF) topology-which is suited for implementation in low power applications. A new compensation scheme for a polyphase filter is proposed. The summation of feedforward signals is implemented by weighted capacitors, without the necessity...
In this paper a class AB CMOS operational amplifier is devised. It is based on a two stages strongly symmetrical topology, very attractive in order to minimize the effects of disturbances arising from a wide class of sources. The amplifier can be fabricated in standard CMOS technology and is suitable for the low voltage supply of current integrated circuits. Simulation results, in terms of EMI immunity,...
Design methodologies for Single-Inductor Dual-Output (SIDO) DC-DC switching converters are presented. The suitable control of a double feedback loop enables the single inductor sharing between two outputs with low output voltages errors and limited load-regulation. The design methods to achieve SIDO converters with a wide input supply voltage range and with an overall driving capability as large as...
In this paper we present a 10-bit, two-bit per cycles successive-approximation A/D converter (ADC). The circuit, operated at 60 MHz clock frequency, achieves a sampling frequency of 10 MHz, requiring only 6 clock cycles to accomplish a conversion. The ADC exploits three comparators to resolve two bits during each conversion cycle. To avoid the severe performance degradation due to offset mismatches...
This paper describes the design of voltage controlled oscillator (VCO) with a low-power static frequency divider. The new LC-VCO replaces one of the NMOS of a conventional differential LC-VCO with a PMOS, which reduces power dissipation to the half and allows operation at reduced supply voltages. Based on a 0.13um UMC CMOS process, the VCO is simulated using 0.8V supply voltage. It is demonstrated...
A distributed linear regulator topology is presented to achieve uniform die temperature to avoid thermal talk between the power converter and the core loads. The topology is validated in 90 nm CMOS technology to supply 200 mA current to core load working at 1.2 V from an unregulated supply varying between 1.62 V to 3.1 V.
A novel single-input second-order multifunction filter realized by employing current mirrors is introduced in this manuscript. The proposed topology offers simultaneously the lowpass, highpass, bandpass, and bandstop frequency responses. Other attractive characteristics are its potential for low-voltage operation and the electronic tuning. In addition, the only passive elements used for realizing...
A new topology and design method for continuous-time (CT) band-pass delta-sigma modulators is presented in this paper. The proposed modulator employs a lamb wave resonator (LWR) possessing high Q-factor. This kind of resonator presents many advantages comparing with the LC or Gm-C resonators. Furthermore, the proposed topology is entirely compatible with the LWR transfer functions. This method facilitates...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.