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The threshold voltage is a fundamental parameter necessary to predict the correct behavior of circuits based on Dynamic Threshold MOSFETs. In this work, we analyzed the short channel effects on this parameter. PISCES simulations of short and long channel MOSFET's based on a 0.2 mum PD-SOI technology were used to investigate the validity of the BSIMSOI model under substrate forward bias. The simulation...
An analysis method for a bit-level product cell used for vector-matrix multiplications is presented. The cell is a combination of a charge injection binary multiplier and an analog accumulator. CID/CCD principles help to understand the cell function and MOS structure equations are used to describe the cell operations.
The present work presented the design of programmable inverter used for design of Soft-Hardware- Logic circuit that represents Boolean functions just configuring external signals fabrication in silicon CMOS technology based in floating gate transistor, also present the simulation of SHL and characteristic the programmable inverter. The Simulations were done using PSpice, with level7 model for MOS...
We review the state of the art of quaternionic solutions for the Force-Free Magnetic Field equations rot Boarr = alphaBoarr (1) div Boarr = 0, where alpha is a non-constant proportionality factor and Boarr is the magnetic induction vector, applied to the study of High Temperature Superconductors. We introduce one method for rewriting this system of equations in quaternionic form, and particularly,...
The results of the characterization of GaAs epitaxial films are presented. Emphasis is made in the identification of the residual impurities and the possible existence of C-H complexes. For the growth of the GaAs epilayers trimethylgallium was used as gallium precursor and metallic arsenic was used as the arsenic source. According to the behavior of the carrier concentration and mobility as a function...
This paper present a new circuit designed to support high accuracy reference voltages over a nearly full range of the power supply. To achieve this, the circuit is designed to be efficient utilizing a CMOS floating gate memory fabricated in 1.2 mum CMOS process. The memory stores voltages as charge on the floating gate of a pMOS transistor. The output voltages of the circuit are easily programming...
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