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A fully integrated four-input combining receiver front-end circuit is designed in a 0.18 μm CMOS technology for laser radar with a static unitary detector (STUD). This circuit consists of four independent transimpedance amplifiers, one signal combiner, a balun and an output buffer in one single integrated chip. The circuit provides 16.2 mW power consumption for a 1.8 V supplied voltage and 59.8 dBΩ...
A dual-mode transimpedance amplifier (TIA) is realised in a 0.18 μm CMOS technology for the applications of 1 Gbit/s laser detection and ranging (LADAR) systems. The proposed dual-mode CMOS feed-forward TIA consists of a voltage-mode inverter input stage with a feedback resistor, followed by a current-mode common-gate amplifier with a feed-forward technique applied at the gate so as to achieve low...
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