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Last-level caches (LLCs) play a crucial role in reducing multicore system energy by filtering out expensive accesses to main memory. Cache compression can increase effective LLC capacity and reduce misses. However, previous designs limit compression benefits caused by internal fragmentation, limited tags, and energy-expensive recompaction when a block's size changes. The authors propose decoupled...
The resiliency problem of die-stacked memory will become important because of its lack of serviceability. This article details how to provide practical and cost-effective reliability, availability, and serviceability support for die-stacked DRAM cache architectures. The proposed approach can provide varying levels of protection, from fine-grained single-bit upsets to coarser-grained faults within...
GPUs have become an attractive target for accelerating parallel applications and delivering significant speedups and energy-efficiency gains over multicore CPUs. Programming GPUs, however, remains challenging because existing GPUs lack the well-defined memory model required to support high-level languages such as C++ and Java. The authors tackle this challenge with Temporal Coherence, a simple and...
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