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The performance of organic thin film transistors (OTFTs) with dual pentacene channel layer (DL) has been studied. Silvaco ATLAS is used to simulate the influence of different device structure parameters. The result shows that the variation in contact placement, thickness of high mobility pentacene layer, the total thickness of two pentacene layers and the height of source and drain result in different...
Zinc oxide is a well-known wide band gap semiconductor material which can be applied to thin film transistors. Al-doped ZnO (AZO) has a better electrical conductivity than Zinc oxide at the same time with good photoelectric properties. In this paper, the method of atomic layer deposition (ALD) was used to prepare the ZnO and Al:ZnO (AZO) thin films as the active layers on silicon substrates at 100...
A single photon avalanche diode (SPAD) device with deep P-well is proposed, which is protected by surrounding P-implantation layer, P buried layer and P+ buried layer. The P+ buried layer of this SPAD device has great help to enhance the uniformity of electric field in avalanche multiplication region. The primary contribution of the P buried layer is to improve the electric field at the edge. Therefore,...
K-nearest neighbor (KNN) classification algorithm performs slowly for large scale training set and high dimensions. To overcome the disadvantage, we need to focus on the points within a predetermined range, without changing the precision. This method is named Predetermined Range Search (PRS). In this paper, we proposed a method to find the reference distance (ReDist), a parallel and pipelined architecture...
This paper presents a 160×120 size 17µm pixel pitch TEC-less uncooled infrared image sensor with low noise output and low power consumption. Aimed at power-saving TEC-less applications, offset skimming and gain stabilization techniques according to substrate temperature change are proposed and implemented. Each column is integrated with a low-power, low-noise backend readout stage including a CTIA...
We design a single photon avalanche diode (SPAD) in a standard 180-nm CMOS technology. The SPAD consists of a P+/n-well junction with octagon shape, a p-well guard-ring and a ploy guard-ring. The two rings prevent SPAD from premature edge breakdown events and STI interface trap influence, respectively. The measurement results show that a typical dark count rate of SPAD is 8 kHz at room temperature...
An analytical model is developed for the fluctuation of the electrostatic potential induced by a single charge in the gate oxide in tunneling field effect transistor (TFET). The model is applied to get the fluctuation of the electric current induced by a single oxide trap in TFET. The results are presented and compared with TCAD simulation.
For the special breakdown mechanism of AlGaN/GaN HEMTs devices, a novel AlGaN/GaN HEMTs with the partial fixed positive charge in buffer layer is proposed in this paper. Through the introduction of the partial fixed positive charge in buffer layer, 2DEG in the area is depleted, then the low 2DEG density region is formed, which modulate the concentration of 2DEG and the surface electric field distribution...
In this work we investigate different topologies of transistor cells that consist of a standard SiGe HBT including specifically designed metal stacks in the back-end-of-line (BEOL). Different test structures have been realized on-wafer using a state-of-the-art BiCMOS technology from Infineon and a complete characterization is proposed including DC and large signal characterization at 77 GHz; also...
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