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In this paper, we study the impact of material parameters (i.e. effective mass and bandgap) for two-dimensional (2D) material based tunneling FETs (TFETs) on circuit level metrics. We estimate circuit level metrics (i.e delay and energy consumption) of 2D TFETs at different target OFF current (IOFF) for various combination of material parameters. To fulfill a given IOFF requirement for circuit level...
This work presents the analog performance of strained SOI nanowires for the first time. Triple gate MOSFETs made in strained and unstrained SOI material with variable fin widths from quasi-planar transistors to nanowires with aggressively scaled fin width are compared using experimental results in the temperature range of 300K down to 10K. Intrinsic voltage gain, transconductance and output conductance...
We present a simulation study addressing the physics and design of ferroelectric MOSFETs and, in particular, we argue that a retrograde channel doping profile may help obtain a subthreshold swing well below 60mV/dec. Our analysis suggests that ferroelectric MOSFETs should be operated at gate voltages smaller than those triggering the hysteretic behavior, and have the potential to realize on current...
Digital technologies are key for the advent and growth of Internet of Things. For the devices closest to the users, they must show performances criteria different than from than needed in pure computing-intensive applications. In particular, the ability to mix digital edge performances with RF or sensor capabilities is key, and some well-adapted technologies, such as FD-SOI, are detailed in the present...
This paper presents an energy efficiency improvement methodology based on the use of additional static biasing instead of margins during design stage. While the impact of margins used to prevent unsystematic process limitations cannot be recovered after fabrication, using biasing anticipation offers the possibility to enable the degradation recovery only when it is required. A CAD study on ARM Cortex...
New concepts in materials science and mechanics design principles provide routes to high performance electronics with physical characteristics matched to those of vital organs of the human body. The resulting opportunities for integration of sensors, actuators, radios and computing capabilities directly on the surfaces or into the depths of targeted tissues have strong potential to improve current...
This paper presents an Ultra-Low Leakage (ULL) 55nm Deeply Depleted Channel (DDC) process technology for low power Internet of Things (IoT) applications. The DDC ULL devices provide 67% reduction in threshold (VT) variation due to Random Dopant Fluctuation (RDF). Circuit techniques such as subthreshold operation and reverse body biasing (RBB) are co-designed with the technology to maximize the energy/power...
This paper presents the use of wireless sensor network (WSN) technologies in a newly growing application space in industrial Internet or industry 4.0. This application space focuses on factory automation and field process management that we call Machine Area Network (MAN) applications. We describe key requirements, major technical challenges and how hardware and software can be combined to address...
Conventional machine vision faces a fundamental latency-power tradeoff, where decreasing latency means increasing frame rate and power consumption. The communication by spikes in the brain provides the inspiration for developments of event-based vision sensors and processing, which could avoid this tradeoff entirely. This paper provides a personal perspective on developments of event-based vision...
In its standard formulation the drift-diffusion (DD) model frame cannot describe the influence of the ballistic resistance on the device characteristics. This results in considerable problems in calibrating the short channel behavior of advanced devices. In this paper, we propose a new formulation for the inclusion of the ballistic resistance into the DD model frame consisting in adding a simple ballistic...
Drain current in Ultra-Thin Body (UTBB) Fully-Depleted Silicon-On-Insulator (FDSOI) device is investigated using Non-Equilibrium Green Function (NEGF) simulations. The effects of phonons (PH) and surface roughness (SR) on saturation velocity are studied. We analyze the current and extract quantities relevant to Quantum Drift-Diffusion (QDD) solvers, such as the quasi-Fermi level, the quantum potential...
We extend our drift-diffusion based model for the carrier energy distribution function (DF), which was derived to describe hot-carrier degradation in LDMOS transistors, for the case of decananometer nMOSFETs with a gate length of 65 nm. This approach is based on an analytical expression for the DF with parameters obtained from the drift-diffusion model. To approximately consider the important effect...
We assess the impact of the conductance response of Non-Volatile Memory (NVM) devices employed as the synaptic weight element for on-chip acceleration of the training of large-scale artificial neural networks (ANN). We briefly review our previous work towards achieving competitive performance (classification accuracies) for such ANN with both Phase-Change Memory (PCM) [1], [2] and non-filamentary...
Nano-LEDs based on mesoscopic structures are the key elements for future low energy consumption optoelectronics as well as for secure, fast and efficient optical communication. We show first results using a novel device concept in which nano-LED emitters based on InGaN mesoscopic structures deposited by metalorganic vapor phase epitaxy (MOVPE) were implemented. The nano-LEDs were integrated in a high...
Graphene has a number of remarkable properties which make it well suited for both transistor devices as well as for sensor devices such as humidity sensors. Previously, the humidity sensing properties of monolayer graphene on SiO2 substrates were examined - showing rapid response and recovery over a large humidity range. Further, the devices were fabricated in a CMOS compatible process which can be...
Nowadays there are two big obstacles for further progress in CMOS device technology. The energy dissipation due to leakage and the energy required to copy information between memory and processor. Even though cutting the power of unused circuits reduces the leakage dissipation to zero, it causes the loss of the locally stored information. Thus, it must be copied back from memory, when the circuit...
Integration of isolated LDMOS transistors in smart power process is subjected to bipolar parasitics due to multi layers constructions that are needed for high voltage operation. These parasitics need to be minimized to assure proper circuit functionality. Several approaches for parasitics reduction are suggested: DTI (Deep Trench Isolation) module optimization, NLDMOS and PLDMOS device construction...
AlGaN/GaN nanowire omega-FinFETs have been fabricated and characterized. Tetramethylammonium hydroxide (TMAH) lateral wet etching and atomic layer deposited (ALD) HfO2 sidewall spacer result in very sharp vertical edges and fin widths from 200 nm down to 30 nm. Omega-gate structure exhibits excellent gate controllability and separates the channel from the underlying thick GaN buffer layer, which leads...
As CMOS device scaling approaches to sub 10-nm node, quantum size effects become significant even at room temperature. Recent progress in the fabrication technology of silicon nanostructures has made possible observations of novel electrical and optical properties of silicon quantum dots, such as single electron tunneling, ballistic transport, visible photoluminescence and electron emission. Possible...
In this paper, we present extensive random telegraph signal (RTS) noise characterization in advanced SiGe:C heterojunction bipolar transistors. In frequency domain, in addition to 1/f noise, generation-recombination (G-R) mechanisms are observed at low base bias in the base noise. Their existence is confirmed by RTS noise measurements in time domain. The RTS amplitude evolves rather slowly with bias,...
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