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This paper presents a design of merged active SHA (sample and hold amp) and first MDAC (SMDAC) used in the first 4-bit pipeline stage of an analog-to-digital converter (ADC). A nested gain boosting technique is first used on the signal path to obtain the required resolution without increasing too much power. A constant-transconductance (constant-gm) bias circuit is designed for corner robustness and...
A novel folded-cascode operational amplifier (opamp) employing the nested gain-boosted technique is presented. The gain-booster in the signal path consists of two-level recursive folded-cascode amplifier to achieve high gain and high speed. The opamp is designed and simulated in 0.13μm CMOS technology, bode-plot results that an open-loop gain over 90dB and a unity-gain frequency up to 4.75G for loads...
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