The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper we have proposed a novel Sense Amplifier (SA) design which is capable of predetermining the direction of offset in threshold voltage in the sensing transistors and which provides up to 24% more current differential by activating a path for current to flow in a device, parallel to the weaker transistor, thus compensating the inherent offset. Due to its self correcting capability, the...
Performance and reliability of nanoscale memory and logic devices is determined by few electron-phenomena. In this context, the organic molecules may offer some advantages for future memory applications. Since, a molecule is the smallest component whose electrical properties can be engineered, it can be argued that the ultimate integrated circuit will be constructed at the molecular level. This fact...
At nanometer technology nodes, variability is a major roadblock for circuit performance. This has made timing estimation of circuits a tedious task. Effective Current Source Model (ECSM) characterization of standard cells has been evolved to solve this issue. In this paper, an analytical Threshold Crossing Point (TCP) model for a two stage buffer is derived. Proposed model relates TCPs with the input...
In this paper, a novel design of diaphragm based pressure sensor has been proposed, which may find its application in Intra Uterine Pressure Catheter (IUPC) system. The novelty of the device lies in the fact that it has got patterned slots over the top layer of the diaphragm similar to a chess-board pattern. This sensor is then compared with a plane diaphragm of same dimensions. In same range of input...
Biologically-realistic synapses serve the role of computation, modification and communication, which makes it an important pillar of spike-based neuron model. Various circuit implementations of different types of synapse exist depending on different functions and applications. This paper simulates Biomimetic Real-Time Cortex Project design of synapse using SPICE code showing theoretical analysis using...
A test circuit for measuring the de-assertion threshold of a Power-on-Reset (POR) circuit is presented. With the help of the test circuit, POR de-assertion voltage can be measured without requiring a dedicated analog pad or a supply voltage higher than the POR supply voltage. The test circuit does not impact the normal mode of operation of POR and the area and power overhead due to the addition of...
We propose a gate-controlled first principle approach based bio-molecular Nano p-i-n Field Effect Transistor (FET). Density Functional Theory conjugated with Non Equilibrium Green's Function has been applied to design this bio-molecular FET in atomic scale region. The device length is 19.618Å and this bio-molecular chain is made with two Adenine molecules and two Thymine molecules, which is attached...
Advantage of 3D ICs is that it has reduced wire-length and greater performance compared to conventional 2D ICs. It is important that a 3D placement tool obtains improved wirelength over 2D placement. In this paper we present the implementation of our 3D placement tool. Our work is based on analytical framework, where we solve nonlinear equations. Placement problem is modeled as quadratic penalty for...
Extracting the maximum energy, with a minimum loss, from an energy harvesting source is one of the primary design goal of an energy processing circuit, and to realize it, an optimized energy processing circuitry is required. An efficient on-chip energy processing circuit is proposed for micro-scale energy harvesting system. When there is an enough ambient energy or more than the energy demand by the...
The MIMO-OFDM improves the link budget, simplifies the receiver and decreases the peak to average power ratio (PAPR) of a transmitting terminal. It includes multiple antennas for transmission and reception. The buffering and scheduling methodology of the data arrived from multiple antennas is very critical in reducing memory size and power consumption. This paper presents the Data Buffering, Scheduling...
This paper presents a Verilog-A implementation of three different energy efficient architectures of Successive Approximation Register (SAR) analog-to-digital converter (ADC) namely SAR ADC with monotonic capacitor switching DAC, SAR ADC with split-monotonic capacitor switching DAC and SAR ADC with bypass window technique. These architectures were constructed for a resolution of 4 bits. Simulation...
Multi Threshold CMOS (MTCMOS) circuit can be used to overcome the trade-off between speed and standby leakage current inherent in single threshold CMOS circuit. The simplest form is the dual threshold CMOS (DTCMOS), in which two threshold voltages are used in the same logic circuit. As a result, the standby power can be greatly reduced by this approach which is a key factor for battery operated devices...
In this paper we address the problem of generating large combinational circuits with good fan in and fanout distribution, high Rent factor and large number of reconvergent gates. Such circuits are in great demand in testing various circuit related algorithms as bench mark circuits or networks. Generation of such circuits is conjectured to be NP Hard problem and available tools are mostly proprietary...
Digital multiplier and squarer circuits are indispensable in Digital signal processing and cryptography. In many mathematical computations, squaring and cubing are frequently used. Generally the multiplier is used in computing square. Using multiplier, the partial products of the squarer are generated which are added to achieve the final output. But the implementation of squaring has the advantage...
With increasing power demands in modern SoCs, macros are designed to operate in multiple low power modes depending upon the voltage value of each supply. Power Aware simulations have been recently in use for simulating and verifying these low power features at the RTL level. The supplies inside PA models of IOs are modeled as ‘reg’ type and can only carry logic values 0/1. These logic values does...
Technology scaling results in reduction of the lateral and vertical dimensions of transistors. The supply voltage (VDD) is scaled down to reduce power dissipation and to maintain device reliability (avoid oxide breakdown). The threshold voltage (Vt) is proportionally scaled down in order to maintain the performance. However, narrow oxide thickness and low Vt result in significant rise in gate leakage...
With the increasing complexity of VLSI circuits and systems, their testing is becoming increasingly complex and time consuming. Apart from affecting the design turn-around time, it poses severe challenges to the test engineers in terms of meeting the power-budget and temperature limit of the chip. Power consumption during test is often much higher than in normal mode of operation. Increasing temperature...
Power Optimal logic depth per pipeline stage has been explored in several papers in the literature. Simulation results on circuit models with inverters have shown that a logic depth per pipeline stage of 6 to 8 FO4 results in optimal power designs and can save good amount of power compared to a logic depth of 24 F04. In this paper we study power and logic depth trade off on ISCAS-85 benchmark circuits,...
The emerging computational complexities arises the need of fast multiplication unit. The importance of multiplication in various applications necessitates improvement in its design so as to obtain the multiplication result efficiently. Multiplication operation can be improved by reducing the number of partial products to be added and by enhancing the adder unit for obtaining sum. The number of partial...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.