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With the increasing complexity of VLSI circuits and systems, their testing is becoming increasingly complex and time consuming. Apart from affecting the design turn-around time, it poses severe challenges to the test engineers in terms of meeting the power-budget and temperature limit of the chip. Power consumption during test is often much higher than in normal mode of operation. Increasing temperature...
QCA (Quantum-dot Cellular Automata) is the promising future nanotechnology for computing. In QCA, the cells must be aligned properly at nano scales for proper functioning. Defects may occur in synthesis and deposition phase. So the defect analyses and testing cannot be ignored. This paper presents a survey on QCA basics, defect characterization and various testing aspects of QCA.
The present work deals with a fault tolerant approach to design the test structure for detecting the fault of cache in chip multiprocessors (CMPs). Fault detection is simplified using a 2-state 3-neighborhood null boundary cellular automata (CA). This has been elaborated in the earlier work of present authors. Self correcting property, however, has been found only in a 5-neighborhood CA and not in...
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