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With a growing demand for complex, safety-critical features in automotive vehicles, functional safety is a key issues of automotive software development. Consequently, standards like ISO26262 propose methods and techniques for the systematic development of automotive software. Furthermore, the growing amount of functionality - including active safety systems or automated driver assistance functions...
High Level Synthesis (HLS) has many productivity advantages over traditional RTL design, but routing congestion is difficult to resolve due to the lack of physical information in HLS. In this paper we propose a novel design flow by integrating a HLS tool with physically aware logic synthesis technology. Using this approach, one can discover congestion problems early and trace their sources to specific...
It is commonly known that physical unclonable functions (PUFs) are hard to predict and hard to emulate. However, in this paper, we propose to use statistical models to adaptively characterize the delay-based PUFs, and use this as a starting point to emulate a delay-based PUF. The essential idea is that for any challenge CA of a delay-based PUF A, there is a high probability of finding a paired challenge...
Neuromorphic computing is recently gaining significant attention as a promising candidate to conquer the well-known von Neumann bottleneck. In this work, we propose RENO - a efficient reconfigurable neuromorphic computing accelerator. RENO leverages the extremely efficient mixed-signal computation capability of memristor-based crossbar (MBC) arrays to speedup the executions of artificial neural networks...
Prior work has shown that printed circuit board (PCB) reverse engineering can be accomplished with inexpensive home solutions as well as state-of-the-art technologies. Once the information of how components on a PCB are connected is determined, an adversary can steal the IP, clone the design, determine points of attack on a system, etc. Existing chip-level obfuscation techniques are not applicable...
Increasing complexity and functionality of automotive SoCs (Systems-on-Chip) leads to a growing part of functionality implemented in firmware. Requirements for short-time-to-market and extensive verification due to safety-critical environments requires firmware development and verification to happen concurrent with hardware development, which is challenging in traditional hardware-centric SoC flows...
Plug-in electric vehicles (PEVs) are considered the key to reducing the fossil fuel consumption and an important part of the smart grid. The plug-in electric vehicle-to-grid (V2G) technology in the smart grid infrastructure enables energy flow from PEV batteries to the power grid so that the grid stability is enhanced and the peak power demand is shaped. PEV owners will also benefit from V2G technology...
Domain Wall Memory (DWM) using nanowire with data access port, exhibits extraordinary high density, low power leakage, and low access latency. These properties enable DWM to become an attractive candidate for replacing traditional memories. However, data accesses on DWM may require multiple shift operations before the port points to requested data, resulting in varying access latencies. Data placement,...
On flow-based biochips, valves that are used to form peristaltic pumps wear out much earlier than valves for transportation since the former are actuated more often, which leads to a reduced lifetime of the chip. In this paper, we introduce a valve-role-changing concept to avoid always using the same valves for peristalsis. Based on this, we generate dynamic devices from a valve-centered architecture...
We give a short overview of stochastic computing (SC) and its uses. SC computes with randomized bit-streams that loosely resemble the neural spike trains of the brain. Its key feature is the use of low-cost and low-power logic elements to implement complex numerical operations in a highly error-tolerant fashion. These advantages must be weighed against SC's inherently slow computing speed and low...
Model-Based Engineering (MBE) is a promising approach to cope with the challenges of designing the next-generation automotive systems. The increasing complexity of automotive electronics, the platform, distributed real-time embedded software, and the need for continuous evolution from one generation to the next has necessitated highly productive design approaches. However, heterogeneity, interoperability,...
We provide a basic introduction of the core ideas and theory surrounding fault-tolerant quantum computation. Quantum fault-tolerance essentially refers to avoiding the uncontrollable cascade of errors caused by the interaction of quantum-bits. The presented concepts underlay the theoretical framework of large-scale quantum computation and are the driving force for many recent experimental efforts...
Modern automotive systems are composed of hundreds of software-implemented features often interacting with physical subsystems under real-time constraints. For efficient management of their development, the features are conceived and realized as product lines involving variability with different variants being deployed in different vehicle classes. The variability information is expressed at different...
This paper presents a control-theoretic approach to optimize the energy consumption of integrated CPU and GPU subsystems for graphic applications. It achieves this via a dynamic management of the CPU and GPU frequencies. To this end, we first model the interaction between the GPU and CPU as a queuing system. Second, we formulate a Multi-Input-Multi-Output state-space closed loop control to ensure...
Ethernet is an emerging technology in the automotive domain and is capable to overcome the bandwidth and scalability limits of traditional buses like CAN or FlexRay. Formal performance analysis methods are required to verify the timing, e.g. by providing upper bounds on end-to-end latencies, in safety-critical real-time systems, such as automotive control and advanced driver assistance systems. In...
Placement is a crucial stage for FPGA implementation. Most FPGA placers optimize their placement results by minimizing half-perimeter wirelength (HPWL). Due to the segmented routing architecture in FPGAs, however, the HPWL function cannot model routed wirelength and delay well. The mismatch of the HPWL function might lead to inferior routing results. Further, heterogeneous circuit blocks in a modern...
Nonvolatile memory technologies such as Phase Change Memory (PCM) and Spin-Transfer Torque Random Access Memory (STT-RAM) are emerging as promising replacements to DRAM. Before deploying STT-RAM and PCM into functional systems, a number of challenges still remain. Specifically, both require relatively high write energy, STT-RAM suffers from high bit error rates and PCM suffers from low endurance....
Providing high quality automotive electronics with low power consumption and high operating performance requires excellent engineering methodology using the most accurate models (APL, CMM, .libs etc). Dynamic voltage drop affects power, timing and reliability of a design. In order to see the correct hot spots and decide on the appropriate counter measures without over-design, it is crucial to have...
Wireless sensor nodes advance the brain-computer interface (BCI) from laboratory setup to practical applications. Compressed sensing (CS) theory provides a sub-Nyquist sampling paradigm to improve the energy efficiency of electroencephalography (EEG) signal acquisition. However, EEG is a structure-variational signal with time-varying sparsity, which decreases the efficiency of compressed sensing....
Targeting network-on-chip based manycores, we propose a novel compiler framework to optimize the network latencies experienced by off-chip data accesses in reaching the target memory controllers. Our framework consists of two main components: data access placement and computation placement. In the data access placement, we separate the data access nodes from the computation nodes, with the goal of...
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