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This paper, for the first time, presents the characterization of a very wide-band flip-chip interconnect from DC to 170 GHz on a liquid crystal polymer substrate. The performance is optimized by modeling the structure in a 3-D electromagnetic simulation software. To mitigate the influence of the capacitive effect caused by the flip-chip overlap section, high impedance inductive sections are used....
This paper presents the first fully on-chip integrated energy harvester and rectenna at the W-Band in 65nm CMOS technology. The designs are based on a 1-stage Dickson voltage multiplier. The rectenna consists of an on-chip integrated dipole antenna with a reflector underneath the substrate to enhance the directivity and realized gain. The energy harvester and rectenna achieve a power conversion efficiency...
A 135–160 GHz active doubler has been developed in 45 nm CMOS SOI. Careful optimization is done on the transistor size, layout and transmission-lines in order to result in the best performance. The doubler shows a measured peak power of +3.5 dBm at 150 GHz and > 2 dBm at 140–160 GHz, at a bias voltage of 1 V. These were achieved at an input power of 7–8 dBm at 70–80 GHz, resulting in a conversion...
A 0.1–1.2 GHz power amplifier using 0.18-µm CMOS technology is presented with a small chip area. With 3.3V supply, the measurement results in this band indicated that the gain is better than 20 dB, the S11 and S22 is less than − 18 dB and −10 dB, respectively. The saturated output power is 20.5 dBm and 19.5 dBm at 433 MHz and 900 MHz with the corresponding PAE of 27% and 19.5%, respectively. The chip...
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