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Two wideband amplifier MMICs are designed and tested. Both designs employ InP double-heterojunction bipolar transistor technology. The amplifiers are designed using cascode cells, in a distributed amplifier topology, with simple on-chip resistive bias circuitry. A single stage design achieves 7.5 dB gain and 192 GHz bandwidth and a 2-cascaded distributed amplifier achieves gain in excess of 16 dB...
A dc-80 GHz compact distributed amplifier (DA) with 15-dB small signal gain is developed in 40-nm CMOS digital process. The circuit architecture is based on the conventional DA (CDA) with gain cell of cascaded single-stage DA (CSSDA). In order to minimize the chip size, the artificial transmission-line sections of DA are implemented with microstrip-line instead of coplanar-waveguide (CPW), and the...
A high-speed downlink communication system is required to meet various applications for nano/small satellites. The purpose of this research is to develop a high-data-rate X band downlink system with low power consumption. A high efficient RF circuits using GaN-HEMT SSPA and low power consumption digital circuits were important. We developed over 300Mbps with occupied BW150MHz, RF power 2W, power consumption...
A millimeter-wave power amplifier (PA) implemented in a commercial 45nm CMOS SOI technology is presented. The PA design is based on stacking of two dynamically-biased Cascode transistor cells where drain-source voltages of individual transistors are added constructively to increase the output power. The PA output impedance is the sum of the output impedances of the two Cascode cells and is optimized...
To combine large number of CMOS power transistors within compact area, a 2D distributed in-phase power combiner is proposed with use of metamaterial-based zero-phase-shifter. One 54 to 62.8GHz PA has been demonstrated in 65nm CMOS with a 4×4 distributed power combining of 16 transistors in compact area of 0.48mm2. Measured results show 16.6dBm output power (OP1dB), 11.3% peak PAE, 95.2mW/mm2 output...
This work presents a high performance GaN on Silicon (GaN-Si) PA that exploits high efficiency Class-J modes over greater than one octave bandwidth. With appropriate choice of device layout, device size, package and operating drain voltage, a design methodology has been applied to obtain a highly efficient, broadband PA realization. A 2mm GaN-Si die housed in a low cost plastic package was selected...
A high power internally matched GaN-HEMT amplifier at Ku-Band was successfully developed. In order to achieve high output power over the targeted bandwidth, a new balancing network is added to the gate side matching circuit. At 24 V drain supply voltage, the HPA delivers 80W of CW RF power with a PAE exceeding 22% over the 13.75–14.5 GHz frequency range. To the best of authors' knowledge, this output...
In this work, we report on developments toward ultra-low noise amplifier modules for the WR4 frequency range, covering 170–260 GHz. The amplifiers in question utilize 35 nm HEMT transistors on a 50 µm thick InP substrate, and were developed at NGC. While recent work in this frequency band has demonstrated the usefulness and advanced technology of utilizing integrated waveguide transitions fabricated...
We present W-band power amplifiers which are designed using the sub-quarter-wavelength transmission line balun in a ring-shaped configuration and fabricated in a 0.25 µm InP DHBT technology. Operating at 86GHz, a single-stage PA exhibits 20.86dBm saturated output power with 10.2dB peak power gain, a recored PAE of 35% and a record 3-dB bandwidth of 33GHz. A two-stage PA exhibits 22.75dBm saturated...
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