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This paper is concerned with the algebraic sign detection of a number in a residue number system. The proposed solution is applicable only to nonredundant systems. The method utilizes a systematic decomposition of the sign function S that is based on some special properties of S. Starting with the canonical sum-of-products expression for S, we transform the expression to a form whose realization is...
Static binary to BCD conversion has been des-scribed in many papers during the last decade, but none of the methods presented were practical for the conversion of large number of binary bits.
Mirror coding for signed numbers is defined "by means pf a set of primitive powers of two {+2n, −2n−1, …−2°} where signs of the usual set used in 2's complement representation are reversed. Use of the mirror representation is shown as an alternate design approach and is illustrated "by a special purpose adder design in mirror code, by an alternate proof of a basic property of sign-ed-digit...
Algorithms are given which compute multiple sums and products and arbitray roots of floating-point numbers with maximum accuracy. The summation algorithm can be applied to compute scalar products, matrix products, etc. For all these functions, simple error formulas and the smallest floating-point intervals containing the exact result can be obtained.
Introduction Many scientific applications today require computers which are very fast and capable of processing large amounts of data. Some advances in scientific processing have been slowed due to the lack of supercomputer capabilities which are required primarily in the area of Central Processor speed and the availability of large amounts of high speed memory. Particularly in the fields of modeling...
A companion paper entitled, "A Unified Numeric Data Type in Pascal", proposes the substitution of the standard data type real of the language Pascal with a unified data representation termed numeric. The numeric data type can represent a variety of arithmetic operands such as integers, normalized floating point numbers, and centered-radius intervals. This paper describes an arithmetic unit...
Since the floating-point operations form the "basic steps in our programs, the programmer has to understand the results that — will be produced by these operations. This paper discusses operations which have been or might be implemented in the hardware. The emphasis is on making the results easy for the user to understand.
This bibliography on computer arithmetic uses, by and large, the format and abbreviations employed by Computing Reviews. It is presented in alphabetical order only and not by individual topics. The topics included, however, span the abstract and implementation problems associated with finite precision computer arithmetics.
The testing of LSI chips is expensive and unsatisfactory. On the other hand there are cases (as in space ship computers) where a damaged chip must be localized and replaced. The use of self-checking chips seems to be one of several possible solutions of this problem. The theory of the structure of self-checking logical circuit is covered by literature at least at the fundamental form (see References)...
A common requirement accompanying high-speed parallel addition is the early detection that the sum is equal to zero. Normally, this condition is detected from the sum, generally at least two logic gate levels after the sum.
Recently, there has been some interest in the use of continued fractions for digital hardware calculations. We require that the coefficients of the continued fractions be integral powers of two. As a result well known continued fraction expansions of functions cannot be used. Methods of expansion of a large number of functions are presented. We show that the problem of selection of coeffiients of...
In this paper we are considering problems of division and multiplication in a computational environment in which all basic arithmetic algorithms satisfy "on-line" property: to generate jth digit of the result it is necessary and sufficient to have argument(s) available up to the (j+δ)th digit, where the index difference 6 is a small positive constant. Such an environment, due to its potential...
We are concerned in this paper with the representation of an integer in a (multiple-modulus) residue number system and, in particular, with an algorithm for changing the base vector of the residue number system. Szabo and Tanaka [1, p.47] describe such an algorithm when each modulus of the second base vector is relatively prime to each modulus of the first base vector. However, we show that a much...
This paper describes the arithmetic and logic design of the digit processing logic of an arithmetic element. The arithmetic element is used in an iterative structure and arithmetic processing takes place serially on a digit by digit basis with the most significant digit first. Starting from the arithmetic specification of the digit processing logic, the arithmetic design (namely, the choice of number...
It is proposed to substitute the standard data type real of a high level language, with a unified data representation which can include a variety of interpretations as well as formats, in order to allow experiments with an environment containing a spectrum of non-standard arithmetics, as well as standard. The implementation of a system is described where syntatic extensions to a language are made...
In ordered sets it is possible to show under certain assumptions two basic theorems concerning the cycle length of sequences of iterates generated by monotone operators. These results are applied to different iterative methods, where the conclusions are valid for the sequences of iterates produced by the numerical computations only, if the used computer arithmetic is properly implemented.
Introduction Recent research has led to the derivation of bounds for the time required to perform arithmetic operations by means of logical elements with a limited number of inputs [1]–[4]. The model of a (d, r) logical circuit C employed in these studies consists of a set of (d, r) logical elements and a rule of interconnection with designated sets of input and output lines. The (d, r) logical element...
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