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In this paper, the use of the SB-ZePoC Coding-Scheme for a high precision AC Power-Standard (TET-Watt) is proposed. The use of SB-ZePoC allows a novel approach to binary switched precision-sources, as the switching-rate is low compared to sigma-delta modulation. The structure of the system allows to reference the output amplitude directly to a DC-voltage-reference or switching a binary source directly...
This paper presents how the optimization of continuous-time (CT) ΣΔ modulators by scaling the loop filter coefficients affects the signal transfer function (STF) and in which way the method can be used to reduce peaking in the STF. It is shown that, depending on the initial design, it is possible to define optimized parameter sets with increased performance and remaining flat STF or sets with constant...
In this paper, we consider inter-spike-interval (abbr. ISI) density of a chaotic spiking oscillator with piecewise-constant vector field. The system generates various spike trains governed by its chaotic behavior. To study these chaotic spike trains is not only interesting for fundamental nonlinear problems, but also important for engineering applications. First, in order to analyze the behavior of...
We describe the mathematical model of a digitally controlled buck converter. This model is an autonomous discrete-time discontinuous piecewise-linear dynamical system in three dimensions. Investigating this system, we find its equilibrium points, describe the shape and size of possible limit cycles (i.e. stable periodic motions), and derive conditions for their existence and non-existence.
A new approach to an analog ultra-low power vision chip design is presented. The prototype chip performs low-level convolutional image processing algorithms in real time. The circuit is implemented in 0.35 µm CMOS technology, contains 64 × 64 SIMD matrix with embedded analogue processors APE (Analogue Processing Element). The photo-sensitive-matrix is of 2.2 µm × 2.2 µm size, giving the density of...
In designing switch mode power supply (SMPS), the desirable feature is to have an efficient and compact design. The main idea is to increase the switching frequency and reduce the bulky magnetic parts of the converter. This leads to a compact size, less weight, reduced cost and increased power density of the converter. This paper presents a high frequency full bridge DC to DC converter, using a multilayer...
This paper presents a pulse-width and position modulator (PWPM) topology suitable for digital centric polar transmitter frontends suitable for software defined radios. PWPM enables the usage of highly efficient switching-mode power amplifiers (SMPA) and direct control of the output power. The presented first implementation of the modulator targets 3GPP and Long Term Evolution (LTE) base-stations and...
A new cyclic ADC structure achieving capacitor mismatch insensitivity is presented. This technique enables cyclic ADC to obtain a very precise residue voltage in cycles independent of matching of capacitors. In addition, this new structure saves the die area of capacitors in the switched capacitor network by 25% and significantly reduces power consumption by up to 40%. A 12-bit 1.67MS/s cyclic ADC...
In this paper we present a low-power low-voltage class-AB amplifier with rail-to-rail output swing capable of operating from 0.5V to 1.0V of supply voltage, and two Sample & Hold (SHA) circuits based on this amplifier. The bias current and the bandwidth of the amplifier depend on the voltage supply, so that for low-power operation a low supply voltage can be used. The two SHAs have a nominal gain...
A novel design methodology is proposed to enable sampling phase-locked loops (SPLL) to synthesise fractional-N frequencies. To date, SPLL can only generate integer-N frequencies. The benefit is that the proposed SPLL has the advantages of both fractional-N PLL and SPLL, such as the faster frequency switching, a smaller phase jump and a larger loop gain. Since the frequency divider can be omitted in...
In scale-space filtering signals are represented at several scales, each conveying different details of the original signal. Every new scale is the result of a smoothing operator on a former scale. In image processing, scale-space filtering is widely used in feature extractors as the Scale-Invariant Feature Transform (SIFT) algorithm. RC networks are posed as valid scale-space generators in focal-plane...
This paper reports experimental observations of injection-locking in a CMOS LC frequency divider with direct injection. Several factors are considered including the amplitude of the driving signal, the harmonic content of the driving signal, the switch size, and the forward body bias of the switch. The experiments are performed using a technique to determine rapidly the boundaries of the Arnold tongue...
The use of continuous-time domain or frequency domain analysis in switched-capacitor systems may often be formally inapplicable due to insufficient mathematical conditions based on the system operating properties itself. This paper introduces a switching time-frequency domain method for the estimation of noise in such systems, while there is no need for periodicity. The switching domain method requires...
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