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The paper presents the direct application of the signal flow graphs (SFG) in calculation of higher order derivatives (sensitivities) of the linear network functions. It is based on the adjoint networks, represented by SFG. Thanks to the application of SFG we can calculate the exact value of any order derivative of the output variables without knowing their solutions in explicit form. Moreover the...
The effect of nonlinearities in injection-locked frequency dividers is investigated and it is shown that the presence of nonlinearities, such as in a CML DFF-based divider, results in a wider frequency locking range. A new divider topology is presented that exhibits both higher operating frequencies and similar wide-locking range compared to the conventional CML DFF-based topology. The chip was fabricated...
This paper presents design considerations on CMOS limiting amplifiers to be used as basic building blocks for power-efficient logarithmic amplifiers. The impact of mismatches and device-level properties on sensitivity and gain-bandwidth product is discussed. To this end, a comparison of several types of low-voltage gain cell topologies is presented. Based on statistical (Monte Carlo) results, a high-sensitivity...
This paper describes an original experimental procedure to extract the oscillator's phase sensitivity to injected noise perturbations. The proposed method relies on measuring the width of the locking ranges over which the oscillator's response synchronizes with an injected small-amplitude signal. The extraction procedure is applied to a relaxation oscillator which exhibits a strongly nonlinear behavior.
One of the problems with on-chip active-RC filters is that in order to satisfy tight specifications accurately, they need to be fine-tuned. This becomes more difficult with increasing filter order. In this paper, we introduce a simplified tuning method which is obtained by a new structure consisting of a filter section of second- or third-order (Biquad or Bitriplet which is referred to as a ‘tuning...
This paper presents analytical expressions for the sensitivity of a low power envelope detector driven by a weak RF signal in the presence of a blocking signal. The envelope detector has been proposed for low power Wake-Up radios in applications such as RFID and wireless sensor systems. The theoretical results are verified with simulations of a modern short channel MOS transistor in a commonly used...
The design of integrated circuits involves the consideration of a large number of constraints of various types. In addition to the definition of these constraints in a constraint-driven design flow, the declaration of new, yet unknown constraint types might be necessary.
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