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In this paper a 10-bit, 5kHz bandwidth, continuous time ADC, which employs level-crossing sampling to convert an analog signal to a digital one, is presented. The proposed level-crossing ADC does not use any clock and sampling in time is not involved. The level-crossing ADC acquires samples only when they provide a new information about the input signal, thus dissipating power only when needed. Cadence...
We describe the mathematical model of a digitally controlled buck converter. This model is an autonomous discrete-time discontinuous piecewise-linear dynamical system in three dimensions. Investigating this system, we find its equilibrium points, describe the shape and size of possible limit cycles (i.e. stable periodic motions), and derive conditions for their existence and non-existence.
This paper proposes a compact mathematical model for predicting and analyzing Delta-Sigma modulator's spurious tones. The model is based on frequency modulation and it outputs an accurate quantization noise estimate array for an arbitrary modulator stimulus: dc, ramp, sinusoid, two-tone, etc. For predicting the pattern noise or limit cycles, the proposed estimation model was found very precise. The...
Application of the ΣΔ modulation technique to the on-chip spectral test for high-speed A/D converters is presented. The harmonic HD2/HD3 and intermodulation IM2/IM3 test is obtained with one-bit ΣΔ sequence stored in a cyclic memory or generated on line, and applied to an ADC under test through a driving buffer and a simple reconstruction filter. To achieve a dynamic range (DR) suitable for high-performance...
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