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Power consumption is an important limitation to analog-to-digital converters. The objective of this paper is to estimate a lower bound to the power consumption of successive approximation analog-to-digital converters. This is an extension of our previous work which was limited to pipelined and flash architectures. We find that the power consumption in our case is bounded by capacitor mismatch or thermal...
This paper proposes a new Built-In Self Test architecture to detect time interval errors (TIE) of Phase-Locked Loops. A transient current sensor utilizing Flipped Voltage Follower (FVF) is used with a comparison block in the proposed topology. It is designed and verified for IBM 65nm technology using 1 V supply voltage and capable of detecting both steady-state and transient currents up to 150 µA...
A high speed comparator based on a high DC-gain folded-cascode amplifier is presented. Four switches rearrange the structure to speed up the comparison process and prevent kickback noise with a simple set of controlling signals. The circuit is a rail-to-rail folded-cascode amplifier during reset/evaluation period which transforms into two back-to-back inverters during the latch period to speed up...
WiMAX (Worldwide Inter-operability for Microwave Access) is an emerging wireless technology standard, which enables high-speed packet data access. To anticipate future demands of WiMAX technology, we propose an all-digital phase-locked loop (ADPLL) based frequency synthesizer for the WiMAX RF transceiver. The developed ADPLL targets frequencies from 2.3–2.7 GHz and from 3.3–3.8 GHz for low band and...
In this paper, an ultra-compact I–V nanometer MOS model, suitable for the analysis of digital circuits, is first proposed. All the main physical effects are included through nine parameters and the model is shown to allow an accurate and quick estimation of DC transfer curves or SRAM noise margins.
An analysis of frequency control techniques for inverter based ring oscillators is presented. The aim of this study is to aid the circuit designer in architecture selection appropriate for a specific application. A brief discussion on ring oscillators is presented followed by an overview of the various control schemes. The circuits are realized in a 40 nm CMOS technology and simulated using Spectre...
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