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A 2.4-GHz CMOS single ended-input differential-output front-end built with a common source low noise amplifier (CS-LNA) and a switched transconductor mixer (SW-MIX) is presented. The circuit is designed and optimized to work in a ZigBee receiver. Since this is a low power consumption standard, a single-ended LNA is preferred over a fully-differential topology because it leads to lower cost in area...
In this paper a novel CMOS latch is designed using a class-AB transconductor as a core. The static latch behavior is studied using a homotopy method which allows highlighting sufficient conditions for the transconductor to become a latch. These last conditions are general and can be used for the design of new latches and comparators. The proposed latch features high speed together with high power...
An OTA-C filter implementation suited to low-voltage operation is presented. An operational transconductance amplifier (OTA) based on a bulk-driven input stage with enhanced DC gain and bandwidth was designed and included in a 1.2-V tunable fully differential second-order OTA-C lowpass filter. Experimental results, obtained in standard 0.35-µm CMOS technology, showed a dynamic range around 70 dB with...
This paper presents a new CMOS analog equalizer for short-reach optical communications. The circuit has been designed in a standard 0.18 µm CMOS process. The equalizer is aimed for multi-gigabit short-range applications, targeting up to 3.125 Gbps through a 50 m SI-POF. The proposed structure operates with a supply voltage of 1 V and has a power consumption of 2.5 mW.
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