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In this study, the electrical characteristics of high-k Tb2O3 polyoxide capacitors combined with rapid thermal post annealing have been improved (i.e.lower leakage current, higher electrical breakdown filed and lower electron trapping rate). The post-RTA annealing treatment can passivate and reduce trap states to terminate dangling bonds and traps in the high-k Tb2O3 dielectric and the interface between...
The first material of silicon dioxide (SiO2) had been proposed as a chemical transducer element of pH sensitive membrane around the early of 1970s. In 1981 Matsuo et al. proposed Ta2O5 as pH sensing membrane. Start from that moment, many materials have been wildly investigated, e.g. Al2O3, SnO2, WO3. The rare -earth oxide, Samarium oxide (Sm2O3), is an attractive material to substitute the previous...
Based on MOS capacitors, this work aims to study the thermal and electrical characteristics of HfLaON with different nitridation treatments by evaluating the device properties and monitoring the induced changes.
In this paper, we report our approaches in realizing EOT of 0.5nm and below with rare earth La2O3 high-k gate dielectric. An EOT of 0.43nm was obtained from a TiN/W/La2O3(3nm)/n-Si capacitor by optimizing the thickness W layer. Our results show that a proper gate electrode is one of the most important factors for realizing EOT below 0.5nm.
We have investigated the role of oxygen in Hf-based high-k gate stacks on Vfb shift. It is clearly shown that the Vfb of the HfSiOx-based high-k materials of the weak ionic oxide was almost constant irrespective of the oxidation annealing temperature. On the other hand, the HfO2-based high-k materials of the strong ionic oxide caused the positive Vfb shifts by introducing additional oxygen into high-k...
A cell-based analytical percolation model recently proposed for the dielectric breakdown (BD) of high-K stack gate dielectrics is reformulated in terms of competing local percolation paths. The model is equivalent to kinetic Monte Carlo implementation of percolation and it is shown to be consistent with large sample size statistical data. This is a physics-based picture that predicts the scaling of...
In this paper, we describe the performance elements used in our 28nm bulk devices with the gate first high-k/metal gate scheme for high performance applications. By using the innovative stressor integrations including improved stress memory technique (SMT), optimized embedded SiGe process and dual stress liner, Ieff of ~540/360 uA/um have been obtained for NMOS and PMOS respectively with the gate...
The principal obstacle to III-V compound semiconductors rivaling or exceeding the properties of Si electronics has been the lack of high-quality, thermodynamically stable insulators on III-V materials. For more than four decades, the research community has searched for suitable III-V compound semiconductor gate dielectrics or passivation layers. The research on ALD approach is of particular interest,...
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