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A low-power high-linearity PGA (Programmable Gain Amplifier) is proposed in this paper. The PGA adopts a differential degeneration structure to vary voltage gain and uses the closed-loop structure including the input op-amps to enhance the linearity. This PGA is fabricated in TSMC 0.13um CMOS technology. The measurements show that the PGA provides 64dB (3dB~66dB) gain range with a step of 1dB, the...
A 6-GHz low-phase-noise voltage-controlled oscillator (VCO) is proposed. A varactor based coarse tuning method which differs from the traditional switch-capacitor based architecture is adopted. The source feedback resistors and a modified filtering technique are used to suppress low and high frequency noises of current source, respectively. To verify the concept, a prototype VCO is fabricated in 0...
A switchable dual-band low power low noise amplifier operated at 900MHz/1.95GHz has been designed for GSM/TD-SCDMA applications using 0.13 μm CMOS process. To achieve noise matching and input matching at both bands, a tunable capacitance bank and a switchable inductor for L-match are utilized. Four gain modes are accommodated with current splitting technique at the second stage. The post-layout simulated...
In this paper, an ultra-wideband low-noise-amplifier (LNA) is designed for low-voltage and multi-standard applications in 0.13 μm CMOS technology. Based on conversional resistive-negative-feedback structure, a novel feedback inductor technology is proposed. The presented LNA achieves a voltage gain of 14.7 dB, 2.95-4.1 dB noise figure from 0.5-10.6 GHz including test buffer. And the IIP3 is -7.2dBm...
A 2.4G-Hz high linear power amplifier (PA) with a parallel class A&B structure is presented. The self-biased cascode transistors are used to improve the reliability. The PA was fabricated in a 0.13-μm CMOS process. Measurement results show the power gain is 9.6dB and the output power at the 1dB compression point is larger than 10.6dBm under a single supply voltage of +3.3V. The measured IMD3 is...
A dual-band 2.1GHz/5.2GHz low noise amplifier (LNA) which can operate at mobile band of 2.1GHz and WLAN band of 5.2GHz frequency is proposed. Input matching, noise matching and narrow-band amplifying are achieved at two frequency bands by adopting a switched inductive output load and a positive-negative feedback circuit. The proposed LNA is implemented in SMIC 0.13 μm CMOS technology with a supply...
A wide tuning range LO generation architecture and its implementation for Software-Defined Radio (SDR) is presented. A continuous wide tuning range is achieved by using a dual mode VCO, a quadrature single sideband mixer and frequency dividers. The dual mode VCO can work either in a wideband mode or in a quadrature mode to support the proposed architecture. The circuit is implemented in TSMC 0.13μm...
An integrated ultra-wideband CMOS RF front-end for UWB 6-9 GHz application is presented in this paper. A single-in-differential-out gain controllable low noise amplifier and a current-reuse bleeding IQ merged quadrature mixer are integrated as the RF front-end. This ESD protected module is implemented in TSMC 0.13μm RF CMOS process and the post-layout simulation results shows that it achieves a high...
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