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In this study, we propose a new technology to fabricate pseudo tri-gate vertical (PTGV) MOSFETs without p-n junctions, named junctionless PTGVMOS (JPTGV). According to numerical analysis, the excellent electrical characteristics such as subthreshold swing (S.S.) ~ 60mV/dec, Ion/Ioff ~ 1010, and low interface trap density are all achieved. The device without p-n junctions provides an easier way for...
The first material of silicon dioxide (SiO2) had been proposed as a chemical transducer element of pH sensitive membrane around the early of 1970s. In 1981 Matsuo et al. proposed Ta2O5 as pH sensing membrane. Start from that moment, many materials have been wildly investigated, e.g. Al2O3, SnO2, WO3. The rare -earth oxide, Samarium oxide (Sm2O3), is an attractive material to substitute the previous...
In this paper, we propose a simple trench-oxide thin-film transistor (TO TFT) process for 1T-DRAM applications. Our proposed TO TFT structure has several novel features as follows: 1. The buried oxide and the isolation oxide are carried out simultaneously in order to achieve a goal of simple process. 2. The trench design is used to improve both the sensing current windows (~ 84%) and the retention...
In this paper, we report our approaches in realizing EOT of 0.5nm and below with rare earth La2O3 high-k gate dielectric. An EOT of 0.43nm was obtained from a TiN/W/La2O3(3nm)/n-Si capacitor by optimizing the thickness W layer. Our results show that a proper gate electrode is one of the most important factors for realizing EOT below 0.5nm.
Ultra-high-vacuum (UHV) deposited Ga2O3(Gd2O3) [GGO] has been employed for passivating InGaAs and Ge, without using any interfacial paissivation layers (IPLs). The GGO/InGaAs and /Ge metal-oxide-semiconductor capacitors (MOSCAPs) have exhibited low capacitance-equivalent-thickness (CET) of less than 1nm in GGO, low interfacial densities of states (Dit's) ~ 1011eV-1cm-2, and thermal stability at high...
High-quality germanium oxynitride (GeON) gate dielectrics for Ge-based metal-oxide-semiconductor (MOS) devices were fabricated by plasma nitridation of ultrathin thermal oxides on Ge(100) substrates. Although ultrathin oxides with abrupt GeO2/Ge interfaces can be formed by conventional dry oxidation, air exposure results in serious electrical degradation. It was found that plasma nitridation forms...
We present a novel bulk-Si dual-channel source/drain-tied (DCSDT) MOSFET with the multiple epitaxial growth of SiGe/Si layers, and selective SiGe removal to form the block oxide island (BOI). Based on the simulations, the SDT scheme achieves better DC characteristics than body-tied (BT) scheme such as: Ion (20% increased), Ioff (71% reduced), Rsd (5.3% decreased), S.S. (19% improved), DIBL (35% reduced),...
GaN “Smart Discrete” power devices were realized using the AlGaN/GaN-on-Si platform, where two built-in intelligent self-protection functions were demonstrated. First, an AlGaN/GaN normally-off high electron mobility transistor (HEMT) with reverse drain blocking capability was realized, featuring a Schottky contact controlled drain barrier. Compared to the Schottky drain structures, the new design...
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