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We report a bias dependent body resistance model for deep submicron PDSOI technology. This model is well verified by the measured data based on the 0.35μm PDSOI process developed by the Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS), and can be implemented in the SOI MOSFET compact model like BISMSOI.
The paper present an ultra-low power NEO using full-CMOS technology based on sub-threshold analog design. The ultra-low power NEO system includes a differentiator with a differential structure and a multiplier based on the dynamic translinear principle. The circuit has been designed in 0.35μm CMOS technology and with total current consumption of about 825 nA. As is demonstrated by the simulation results,...
A current buffer compensation Low Dropout (LDO) regulator for portable applications is present in this paper. The current buffer compensation scheme is a current feedback amplifier, which provides low output impendence in order to move the non-dominant pole due to the large gate capacitance of the pass transistor of the LDO regulator to high frequency. This LDO circuit had been designed and implemented...
Stability is a critical design issue for radiation detection readout circuit when high counting rate together with low power property is simultaneously required. In this letter a novel method which increases the phase margin of the pulse shaper is presented. A readout circuit using this compensation technique has been implemented in 0.35 μ CMOS technology. Simulation and test results show that this...
This paper presents a cell balancing management for battery pack. It is used for each cell in battery pack to protect pack from damages such as overheating and overvoltage taken by the different performances between different cells, it manages individual cell with CC-CV charging strategy, shunts charge current smoothly to protect every cell preferably; in order to be suitable for different charge...
Direct digital frequency synthesizer (DDFS) plays an important role in modern digital communications. This paper proposes a novel implementation of a 300MHz direct digital frequency based on modified CORDIC in 0.35μm CMOS technology. The CORDIC algorithm is a well-know iteration method for the efficient computation of fundamental functions, but each iterate selects the rotation direction by analyzing...
A variable gain and output power CMOS power amplifier is presented in this paper. With combination switch controls of three cascode devices in the driver stage, the power amplifier can achieve a variable power gain and output power (seven types). The power amplifier was fabricated in 0.35-μm standard CMOS process, and is able to deliver a power gain of 10.5~27 dB and an output P1dB (1-dB compression...
This paper discusses the design and implementation of a sample-and-hold circuit integrated into a high-speed and high-resolution A/D converter. In order to achieve the required speed and resolution, mixed MOS transistor channel length amplifier is used. The sample-and-hold circuit processes a differential 2.5-Vp-p output signal swing and achieves 16-bit linearity with sampling frequency up to 100...
Based on the application of high-speed, high-resolution A/D converter, this paper describes the design and implementation of a novel high-speed comparator. The comparator uses the high-speed, transmission delay stability technology, the auto-zero technology, and the cascade technology in order for the comparator to have the high-speed, high-resolution, transmission delay stability features. Its performances...
A two-transistor active pixel image sensor (2T-APS) architecture is proposed. Instead of a reset transistor, a diode within the pinned photodiode sensor is used to reset the charge-sensing node in each pixel without any extra area. The new architecture can be used to increase the fill factor and/or reduce the pixel pitch. A test structure of the 2T-APS has been demonstrated using 0.35 μm CMOS technology...
A smart temperature sensor based on 0.35um ASMC CMOS process with an inaccuracy of ±1°C from -55°C to 125°C is presented. The sensor uses substrate vertical bipolar transistor to measure the temperature and errors resulting from nonidealities in the readout circuit are reduced to 0.1°C level by applying dynamic element matching (DEM) and chopping offset cancellation techniques. By using pseudo-random...
This paper presents a high gain and wide bandwidth fully differential operational amplifier (op amp) used in a sample and hold amplifier (SHA) circuit for a 12bit, 50Ms/s pipelined ADC. The gain-boosted technique is adopted to achieve a high gain without reduction of the output swing, while a new frequency compensation method is developed to compensate the bandwidth degradation caused by the gain-boosted...
A novel frequency hopping technique is proposed to increase the efficiency in a switched-capacitor LED driver, based on analyzing the dependence of power loss on switching frequency. LEDs' load current is featured uniquely by jumping periodically from a constant value (20mA) to zero for dimming function. Developed on an improved VCO, the hopping technique makes the switching frequency vary discretely...
A novel 150V-BCD technology by using 14um thick epitaxy based on 0.35um standard CMOS process has been developed for LCD backlighting application. In the whole process with 24 steps, HV circuit block, including VDNMOS and LDPMOS with double resurf principle, and LV block are integrated together. Advanced deep trench isolation (DTI) technology with the breakdown voltage above 150V is firstly in place...
A CMOS ASIC has been designed and implemented for readout and control of MEMS vibratory gyroscopes. A low noise design is achieved by using the technique of sinusoidal chopper stabilization with a chopping frequency of 2MHz, which will effectively suppress the low frequency noise. A closed loop control method in driving mode is presented. The Chip is fabricated in a 0.35μm standard CMOS process with...
A switch-mode Li-ion battery charger is proposed. It is suitable for input power supply of wall adaptor or USB port in modern portable apparatus. When it works under USB port supply, its input current is automatically limited at a presetting value. A power-path management is introduced in to realize charging and power supply simultaneously based on load priority. It also realizes smooth transition...
In this paper, we present the design of a low-power, high power supply rejection (PSR) voltage regulating circuit in a 0.35μm standard CMOS process. A CMOS full-wave bridge rectifier is designed to generate an unregulated DC voltage. A low dropout (LDO) series voltage regulator converts the unregulated voltage to a stable and clean DC supply voltage. A self-biased wide range and high power supply...
10bit column-parallel integrating ADCs intended for infrared image sensor are presented in this paper. The column scale is 160 and the width of each column cell is 32μm. The ADCs introduce a proposed architecture to eliminate offset error and a novel circuit structure to substrate background signal. A prototype ADCs is designed in 0.35μm CMOS technology with 5V power supply. The simulation results...
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