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CMOS compatible nanowires provide an interesting opportunity to integrate logic functions in interconnects levels. We report here the development of a method to grow silicon nanowire using back-end-of-line compatible copper-based catalysts. Our approach is based on oxidation of copper prior to growth and allows reducing silicon nanowire synthesis temperature below 450°C, a Back-end-of-line compatible...
We have investigated electromigration process at metal nanojunctions as small as several tens of atoms and found that the elementary process of electromigration in such nanojunctions is the self-diffusion of metal atoms driven by microscopic kinetic energy transfer from single conduction electrons to single metal atoms. We have also shown that metal nanojunctions are stable and can support extremely...
Low cost and low temperature fabrication process is required for TSV. In this study, we propose a low temperature deposition of barrier and copper seed layers by wet process only using electroless plating. Moreover, we use AuNPs as a catalyst which is densely adsorbed on SiO2 sidewall of TSV with SAM. We succeeded in conformal deposition of barrier and seed layers, and this method is effective for...
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