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In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the number of cores inside a CMP increases, the on-chip interconnection network will have significant impact on both overall performance and power consumption as previous studies have shown. On the other hand, CMP designs are...
It is clear that Cloud computing is and will be a sea change for the Information Technology by changing the way in which both software and hardware are designed and purchased. In this work we address the use of this emerging computing paradigm into web hosting providers in order to avoid its resource management limitations. Thanks to the Cloud approach, resources can be provided in a dynamic way according...
Artificial Bee Colony (ABC) algorithm is an optimisation algorithm based on the intelligent behaviour of honey bee swarm. In this work, ABC algorithm is used to optimise the equilibrium of confined plasma in a nuclear fusion device. Plasma physics research for fusion still presents open problems that need a large computing capacity to be solved. This optimisation process is a long time consuming process...
Desktop Grids harvest the computing power of idle desktop computers whether these are volunteer or deployed at an institution. Allowing foreign applications to run on these resources requires the sender of the application to be trusted, but trust in goodwill is never enough. An efficient solution is to provide a secure isolated execution environment ("sandbox"), which does not constrain...
Many parallel applications in MPSoCs take advantage of multicast communication. Several multicast schemes such as path-based, tree-based, and unicast-based have been proposed in interconnection networks. Path-based multicast scheme has been proven to be more efficient than the other schemes in on-chip interconnection network. A new adaptive routing model based on Hamiltonian path for both the multicast...
Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, many-core chips demand new interconnection strategies, since traditional crossbars or buses, common for current multi-core processors, have problems related to wires and scalability. For this reason, Networks-on-Chip (NoCs) have been developed in order to support the performance and parallelism...
Increasing memory parallelism in MPSoCs to provide higher memory bandwidth is achieved by accessing multiple memories simultaneously. Inasmuch as the response transactions of concurrent memory accesses must be in-order, a reordering mechanism is required. To our knowledge the resource utilization of conventional reordering mechanisms is low. In this paper, we present a novel network interface architecture...
The commercial success of Cloud computing and recent developments in Grid computing have brought platform virtualization technology into the field of high performance computing. Virtualization offers both more flexibility and security through custom user images and user isolation. In this paper, we deal with the problem of distributing virtual machine (VM) images to a set of distributed compute nodes...
ITER is the next generation of fusion devices and is intended to demonstrate the scientific and technical feasibility of fusion as a sustainable energy source for the future. To exploit the full potential of the device and to guarantee optimal operation for the device, a high degree of physics modelling and simulation is needed. The European project Euforia contributes to the development of a platform...
Nowadays, MMOGs are extensively used as they provide the ability for centralized gaming with many players. MMOGs can be classified into three different categories: MMRPOG that are role games, MMORTS based on real-time strategy games and MMOFPS named as first person shooter games. The computational requirements of these categories are different. In this paper we focus on MMOFPS, whose main gaming requirements...
Media spaces provide users with flexible support for easy interaction with technology and with each other, both at the same place and over distance. From a technological perspective the development of these environments is often inefficient, since most environments are developed specifically, without any synergies or reuse of previous concepts and implementations. In this paper we present the cooperative...
Data and service delivery have been historically based on a ''network centric'' model, with datacentres being the focal sources. The amount of energy consumed by these datacentres has become an emerging issue for the companies operating them. Thus, many contributions have proposed solutions to improve the energy efficiency of current datacentre architecture and deployments. A recently proposed approach...
Virtualization technologies have recently gained a lot of interest in Grid computing as they allow flexible resource management. However, the most common way to exploit grids relies on dedicated services like resource management systems (RMSs) to get resources at a particular time. To improve resource usage, most of these systems provide a best-effort mode where lowest priority jobs can be executed...
Multicore processor architectures provide huge computation power by leveraging multiple levels of parallelism. However, it is non-trivial to orchestrate computational and memory resources allocation on the multicore platform. In this paper, we model the resources allocation for multicores as an optimization space, including variant selection, grouping and PE assignment. Finding efficient parallelization...
This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a several-node SMP NUMA system. The main objective is to determine the performance effect of bus contention and cache coherency in such a complex architecture. Results show that: (1) cores which share a socket can be considered as...
In this work we describe an optimization technique for PIC/MC modeling of the plasma edge using High Performance Computing. The developed code BIT1 can be used for 1D3V plasma and 2D3V neutral particle modeling with a reasonable scaling up to 1000 and more processors.
An emerging application field for structure matching is related to in silico studies of molecular biology: considering that protein function is mainly related to its external morphology, the possibility to match macromolecular surfaces is very important to infer information about the interaction of biological components. In this work we present a parallel algorithm based on images of local description,...
Tissue MicroArray technology aims to perforin inimunohistocheniical staining on hundreds of different tissue samples simultaneously, allowing faster analysis and considerably reducing costs incurred in staining. The presented work supports the pre-array phase of this technique, i.e. the automatic discrimination between normal and pathological regions within the analyzed tissues, and it works in the...
Current wide availability of multicore systems requires tools that can help scientists to smoothly update their applications to take advantage of the parallel processing capabilities of these systems. In this paper, we present an experience with aspect-oriented programming (AOP) techniques to perform this move. We describe the parallelization of a Java library that implements algorithms from the Evolutionary...
Multicore nodes have become ubiquitous in just a few years. At the same time, writing portable parallel software for multicore nodes is extremely challenging. Widely available programming models such as OpenMP and Pthreads are not useful for devices such as graphics cards, and more flexible programming models such as RapidMind are only available commercially. OpenCL represents the first truly portable...
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