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In this work a review of the basic concepts of recently developed two-dimensional profiling techniques is given. The methods are based on spreading resistance measurements, atomic force surface topography and transmission electron microscopy. The use of spreading resistance for two-dimensional profiling has been introduced three years ago. In the mean time the experimental procedure and the interpretation...
Removal of photoresist after plasma metal etch becomes more difficult as the metal etch requirement and metallization systems become more complicated. We have found that the most effective method to remove the damaged metal oxide surface caused by oxygen plasma ash is to use a patented (USP 5,279,771) buffered hydroxylamine reducing solution (EKC-265). Auger analysis indicated the complete removal...
A new fabrication method for SiGe-HBTs is presented using molecular beam epitaxy (MBE) for growing the device layers on SiO2 patterned Si wafers. The epitaxial layers inside the SiO2 windows are monocrystalline. The polycrystalline Si and SiGe on top of the surrounding SiO2 is used for the base contact. This technique reduces the parasitic base-collector capacitances. The first differential SiGe-HBTs...
In this article several features of the selective epitaxial growth of SiGe by LPCVD are discussed, such as the pad size dependence of growth rate, composition and strain relaxation. Finally, intense photoluminescence from sub??m dots with SiGe/Si multiple quantum wells is presented.
This work introduces a comprehensive analytic model of the sputtering mechanism present in IBE and RIE processes. Our final objective is to correlate the etch rate to the plasma reactor parameters. Experimental verifications for GaAs etching show a good agreement for IBE. In the case of RIE, the non perfect agreement is explained by the influence of effects such as flow rate and temperature not taken...
MOSFET can be degraded during plasma processing due to high field induced charging, ion species diffusion and ultraviolet light bombardment. In an ``as processed'' device, the effect of plasma charging is not seen presumably due to the annealing effects in subsequent processing steps. However, when these devices are subjected to Fowler-Nordheim (F-N) or hot carrier (HC) stress, the effect of damage...
DUV excimer based imaging appears to be one of the best candidate for printing subhalf micron devices. In this paper we have investigated the potentiality of such a technique to process 0.35 μm CMOS devices with 3 levels of metallization. Depending on the level to process, positive or negative tone chemically amplified resists have been used. The processing conditions as well as exposure and focus...
Fabrication of self-aligned silicide of CoSi2 on source/drain areas in a tungsten polycide (WSix/poly) process is demonstrated. CoSi2 is formed by RTA under conditions identical to the poly gate process, i.e. no extra capping layer is required on top of the WSix gate. The materials interactions of WSix with Co films during RTA and subsequent wet etching steps have been studied. Transistor results...
A method for removing damage imposed upon substrates during Reactive Ion Etching (RIE) is described. The technique involves using a finishing low power etch after the main etch. It is seen that there is a limit to the amount of carbon dioxide that may be used in etchant mixtures, if damage to the substrate is to be avoided. An oxygen plasma clean may be used to remove organic residue after RIE. However,...
We describe a new technological process which allows to avoid Reactive Ion Etching (RIE) on the laser active layer. Combining this process with the growth uniformity of the Chemical Beam Epitaxy (CBE) we are able to obtain high yield process and good device performances.
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