The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The operation of inverters, fabricated in a 1 ??m partially depleted SOI CMOS technology is investigated from room temperature down to liquid helium. It is demonstrated that the transfer characteristics suffer from the floating-body anomalies, like the kink and the breakdown/latch behaviour. Additionally, at 4.2 K, hysteresis, which is related to the cryogenic (freeze-out) behaviour of the n-MOSFETs...
We show that a remarkable threshold shift ??Vp and an increase in the saturation current ??Ids can be observed in AlGaAs/InGaAs PM-HEMT's submitted to high temperature (100??C - 200 ??C) storage or hot-electron stresses for relatively short times (about 20 hours). An increase in Ids up to 40% has been observed. The increase is not permanent and can be recovered by a room or low temperature storage...
In this paper the electrical performance of submicron MOS transistors at low temperatures is explored. This way we found that second-order effects like; the bias dependent series resistance, the second substrate current hump and some others, are amplified allowing so an easier way to study them and to determine their physical origin.
SiGe heterojunction bipolar transistors (HBTs) with very thin n+ hydrogenated amorphous Si (α-Si:H) emitters and various doping and Ge distribution profiles in the bases are reported. An analytical model defining the leverage of the structures in terms of current gain and high Early voltage is presented and verified experimentally. Devices having a base doping concentration of 1??1019cm-3, a base...
The processing and characterisation of 6H-SiC PiN diodes is described. Comparisons are made between diodes with different surface passivations, and numerical simulation is used to better understand their behaviour. A ``wet'' thermal oxide with a deposited silicon nitride layer on top is found to be the best surface passivation. This permits on-wafer high-voltage measurements to be made in air, possibly...
The on-state voltage of the 4.5 kV and 10 kV PT and NPT IGBT structures in 6H SiC has been investigated by means of numerical simulation using an improved version of TMA's Medici which includes anisotropic physical models. A realistic trench gate UMOS type structure has been used. The influence of the carrier lifetime and temperature on the on-state characteristics have been studied. The shortest...
A new method for the extraction of the Drain Induced Barrier Lowering (DIBL) parameter in a MOSFET is presented. This method is employed for the study of the influence of temperature on the DIBL phenomenon. The DIBL coefficient is found to be almost temperature independent between 50K and 300K. The method also allows the intrinsic output characteristics of the device to be re-calculated.
The first systematic study of p-Si1-xGex/Si multiple quantum well infrared detectors (QWIPs) grown by low pressure vapour phase epitaxy (LPVPE) is described. The inclusion of undoped Si1-xGex spacer layers adjacent to the p-doped alloy reduces the weakly temperature-dependent ``tunnelling'' component of the dark current. The peak wavelength in the photoresponse spectrum is tuned between 7.2-10.2??m...
The anomalous off current (Ioff) in poly-Si thin film transistors (TFTs) is one of the major problems preventing the use of these devices in active matrix liquid crystal displays. While previous investigations have focused on the temperature range above 300K, in this study we analyse the behaviour of Ioff over a wider range of temperatures, namely 180 to 400 K. Our results provide for the first time...
Fabrication of MOSFET's with deposited instead of thermal gate oxide could provide the ability to reduce the thennal budget of CMOS technology process. To compete with thennal oxides, deposited oxides must demonstrate that they combine a high permittivity, high reliability and a good interface quality. In this paper we compare the electrical properties of MOSFET's fabricated with thermal oxides and...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.