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Modern computing systems often adopt multiple processing elements to enhance the computing capability or reduce the power consumption, especially for embedded systems. Such configurations impose challenges on energy efficiency in hardware and software implementations. This paper targets energy-efficient task partitioning for real-time tasks on a platform with two heterogeneous processing elements...
In this paper, we focus on scheduling jobs on computing Grids. In our model, a Grid job is made of a large collection of input data sets, which must all be processed by the same task graph or workflow, thus resulting in a series of workflow problem. We are looking for an efficient solution with regard to throughput and latency, while avoiding solutions requiring complex control. We thus only consider...
Strategies for partitioning an application??s data and computation play fundamental role in determining the efficiency of parallelization. This paper describes a sophisticated strategy for partitioning data and computation known as multi-partitioning, which can support the best parallelization for some applications such as the line sweep computations. However, the implementation of multi-partitioning...
The Intel Cup Undergraduate Embedded System Electronic Design Contest is an embedded system design invitational contest in China. This contest is held every two years since 2002. The contest focuses on the embedded system design and implementation. And it gives undergraduates a chance to show their creativity and learn teamwork. The influence of the contest is keeping increasing. Now it is an international...
Fault tolerance is a critical issue in the arena of large-scale computing. The fault-tolerant parallel algorithm (FTPA) is an application-level technique for tolerating hardware failures. FTPA achieves fast failure recovery making use of parallel recomputing. However, it complicates the coding of the application program. This paper uses compiler technology to automate the design of FTPA, and introduces...
The need to parallelise desktop applications is becoming increasingly essential with the mainstream adoption of multi-cores. In object-oriented languages, sequential iterators handle iterative computations of a sequential program; similarly, the parallel iterator was developed to handle the iterative computations of a parallel program. This paper presents the progress of the parallel iterator concept...
As power dissipation of the register file in modern processor designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing the SPARC windowed register file power based on the operation of the Partitioned Register File Inspector added in the decode stage of the pipeline. The power savings show that, when the size of the Register File Inspector...
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