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The switching audio amplifiers are widely used in various portable and consumer electronics due to their high efficiency, but suffers from low audio performances due to inherent nonlinearity. This paper presents an integrated class D audio amplifier with low consumption and high audio performances. It includes a power stage and an efficient control based on sliding mode technique. This monolithic...
Body sensor network (BSN) is a wireless network of implantable and/or wearable smart sensors. They can be deployed in medical applications, such as patients monitoring inside or outside hospital environment, as well as in high performance professional sports and other non human related applications. The size of a sensor node and its power consumption are major challenges in the design of implantable...
In this paper, we propose a new efficient design of a hybrid full adder cell combining two logic styles and a negative differential resistance (NDR) device realized in a fully depleted (FD) silicon on insulator (SOI) double-gate (DG) MOSFET technology. Simulation results show significant (65%) power savings for asymmetric gate workfunction and independent gate control full adders with respect to standard...
Dual-edge triggered flip-flops allow the operation of the clock distribution network at half the frequency leading to significant power reduction. We have simulated an energy recovery and a square-wave clock distribution network with 10,240 single-and dual-edge triggered flip-flops at 500 MHz and 250 MHz, respectively. Dual-edge triggering results in a total power reduction of 26% in the energy recovery...
Power consumption is an important constraint in the design of battery-operated embedded systems. Minimizing power dissipation may be handled in terms of hardware or software optimizations. Source code-level optimization techniques have been used as an alternative to achieve low power consumption when programming embedded systems. However these techniques should be analyzed with statistical sound methods...
Given a circuit netlist, based on the slack analysis in the netlist, the optimal voltage in a maximum slack-sharing cluster(MSC) can be obtained to maintain the performance of the netlist. Furthermore, according to the optimal voltages of all the MSCs and the constraints for multiple-voltage assignment, an efficient assignment approach is proposed to assign multiple voltages onto the given circuit...
This article proposes a simple trans-impedance amplifier (TIA) using a given (i.e. 0.18 micron CMOS) VLSI technological process. The TIA offers a very wide band-width of operation with very small power consumption. Compared with several TIA reported in the past, our TIA is more competitive when band-width (more than 4 GHz) versus power consumption (less than 3.5 mW) criterion is used as a metric for...
In this paper a hold-friendly scan flip-flop is introduced whose scan pin hold characteristic has improved while data pin timing and power are left intact. This characteristic helps to resolve scan chain hold problem while meeting the maximum frequency in data path. This solution can reduce the number of buffers inserted in the scan chain to fix hold violations. The new flip-flop can save up to 27%...
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