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The electrical properties of several potential gate dielectric materials as silicon oxides and oxynitrides with thicknesses of 15-35 Aring have been analyzed by the corona characterization of semiconductor (Cocos) method. The silicon oxides are grown by conventional furnace as well as by wet and radical RT oxidation processes while the silicon oxynitrides represented by reoxidized RT nitride and plasma...
Laser annealing is one of the process solutions to enable ultra shallow junction (USJ) formation for the 45 nm technology node. However, variations in the front-side optical properties of device wafers cause large temperature variations on the wafer surface which, in turn, cause large variations in activation of the dopants that form the junction. As a result, pyrometry and closed loop temperature...
Advanced-logic device technology for the 65 nm node and beyond requires highly-activated, shallow, and abrupt dopant profiles (Int. Technol. Roadmap for Semicond., 2003). The combination of ion implantation and an advanced annealing technology is expected to provide solutions for these requirements. In contrast to spike annealing, a diffusion-less but highly activating, high-temperature, flash-assisted...
Authors summarize and update the status of plasma doping (PD) using He plasma amorphous (PA) technology and spectroscopic ellipsometry (SE). Authors also recommend PD as the best alternative method for ultra shallow junction formation at the 45 nm technology node and beyond. The latest annealing methods of laser annealing (LA) and flash lamp annealing (FLA) were combined with PD. Conventional spike...
A new capability for the measurement of the temperature-dependent emittance of specular samples in the near infrared spectral region has been developed in NIST's infrared spectrophotometry laboratory to provide emittance measurements and standards for a broad range of applications including rapid thermal processing (RTP). Our approach employs the indirect measurement of reflectance and transmittance...
It has been proposed that the volumetric radiation heat absorption/emission inside the wafer should be considered in the rapid thermal processing to account for the temperature distribution. In this study, the combined conduction and radiation heat transfer inside the wafer was solved by using a commercial computational fluid dynamics and heat transfer software tool. Since the precise information...
As the size of metal oxide semiconductor devices continues to be scaled down to sub-90 nm, novel materials must be integrated successfully in order to meet the technical demands. Nickel silicide (NiSi) is being considered as an alternative material to cobalt silicide (CoSi2) for the self-aligned silicide process, because it forms at lower temperatures with less silicon consumption and is compatible...
Since the mid-1980's a great deal of effort has gone into simulation of wafer and die-scale thermal behavior during "conventional" rapid thermal processing (RTP) anneals. With ultra-fast anneal processes such as flash-lamp anneal and laser anneal taking a more prominent position in semiconductor manufacturing. The fundamentals of wafer heating such as time scales, associated lengths scales,...
The impact of a post deposition annealing step of ECD copper and of a predeposition annealing step on the Cu seed has been investigated. Compared to forming gas it can be demonstrated that the addition of a small amount of ethanol can very effectively reduce the surface and grain boundary oxidation with benefits for the electrical parameters. The impact of a de-oxidation step down to 100degC on the...
Integrated circuits in safety critical applications like airbag or ABS have high quality requirements. During production of these chips the control of the quality must be applied down to each single process step. If the single wafer process is a RTP step the electrical power used to heat up the wafer can be tracked to monitor the system behaviour. In combination with other parameters like chamber...
The objective of this research was to form a uniform NiSi layer on MOSFET devices. It has been widely recognized that two-step rapid thermal processing (RTP) is much more effective than one-step RTP in controlling the silicide thickness, and reverse narrow poly line effect. In addition to verifying the number of RTP process steps, soak annealing and spike annealing were intensively investigated to...
Silicidation process for fully-silicided (FUSI) Pd2Si gate formation has been investigated. Two types of heating equipment was used for siliciding palladium deposited on a poly-Si/SiO2/Si MOS structure. One is lamp heating in a sputtering chamber and another is hot-plate heating. The former provide slower heat-up ramp because of relatively large thermal capacity. In this case, metal-rich phase was...
Understanding the radiative properties of silicon is crucial to accurate measurement of the temperature of silicon wafer during rapid thermal processing (RTP). Prediction of the radiative properties requires precise knowledge of the dielectric function of silicon in RTP environments. In general, the dielectric function or equivalently optical constants of silicon are complicated functions of the wavelength,...
Advanced-logic and DRAM technology for the 90 nm node and beyond results in increasingly stringent particle specifications. Particles can be transported to the sensitive wafer surface via sedimentation, convective diffusion, thermo- electro-and photophoresis. Depending on the manufacturing equipment, the various transport mechanisms are more or less dominant. In atmospheric rapid thermal processing...
When a production semiconductor with un-relaxed ion-implanted regions or wafer is subject to external irradiation, a portion of the incident energy is absorbed within the wafer volume, rather than at the surface. The volume absorption will alter the distribution energy within the wafer, resulting in temperature non-uniformity. In order to access the contribution of the volume absorption and emission...
The radiative properties of engineering surfaces with microscale surface textures (patterned or random roughness and coating) are of fundamental and practical importance. In the rapid thermal processing or arc/flash-assisted heating of silicon wafers, the control of energy deposition through radiation and the surface temperature measurement using optical pyrometry require in-depth knowledge of the...
SiON gate dielectric is optimized for general purpose 65 nm node applications by using a first nitridation approach. A process parameter screening is done where the resulting SiON films are analyzed by angle resolved XPS and non-contact probing by Quantox. Good correlation between XPS and Quantox results are found. We demonstrate also correlation between Quantox results and transistor performance...
This paper introduces a high productivity single wafer radical oxidation system developed for les90 nm device node. Today's semiconductor device manufacturers face dual challenges of increased technical complexity at virtually every process step, and fast introduction of new products with minimal cost. Up until now, furnaces have satisfied the thermal oxidation requirements in most fabs. The scaling...
The reaction mechanism of nitrogen atoms with Si was investigated based on first principles calculations and experimental results to realize ultra thin SiN-based SiON films with high insulation and good interfacial properties. Incorporation rate of nitrogen atoms into Si has a great influence on arranging 3-fold coordinated N atoms uniformly. By arranging 3-fold coordinated N atoms into the Si sub-surface...
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