Memory circuits occupy substantial area percentage of recent integrated circuits' chips. In addition, the continuous scaling of CMOS technology faces increasing technological difficulties. Thus, there is a need for alternative technologies that can offer larger memory densities and better performance. Spintronic memristor offers a good alternative for memory design due to its inherent non-volatility, good scalability, and radiation hardness. In this paper, a read/write circuit for spintronic memristor-based memories is proposed. The proposed read/write circuit achieves a significant reduction in the occupied area. The read disturbance of the circuit is investigated to calculate the maximum allowed number of reading cycles before a refreshment operation is needed.