Thermal runaway is among the major failure mechanisms of power semiconductor packages. Thermal dissipation of power electronics depends on the quality of the solder die-attach, any defects such as voids, and delamination-impede heat dissipation that results in hot spots that can cause thermal runaway and/or a premature device failure. Therefore, investigation of thermal impact due to die-attach defects is indispensable for improved device performance and reliability. In this paper, transient dual interface measurement is used to characterize the thermal path of a power electronic package consisting of an insulated gate bipolar transistor (IGBT) and copack diode. The die-attach defects were identified by X-ray imaging. The impact of voids on thermal dissipation was quantified by junction-to-case thermal resistance and structure function analysis. The junction-to-case thermal resistance (IGBT) values were found to be increasing with the increase in void%. The largest void% instead of the total void% has a greater impact on the thermal dissipation of the devices. However, die-attach voids under the IGBT die have no impact on junction-to-case thermal resistance (diode), suggesting that the copack diode heat path is independent of the IGBT heat path.