Signal adaptive multiple-clock-cycle, but also completely pipelined hardware implementation of the optimal (Wiener) time-frequency filter is proposed in this paper. The verification of the proposed design is provided, as well as the most implementation details and the extensive comparative analysis. All significant characteristics of the corresponding recently proposed signal adaptive filtering solution (which shows the optimized time and hardware requirements) are retained by the developed implementation. Namely, the design proposed here enables the implemented filter to take variable (signal adaptive) number of clock cycles per a time-frequency point within the estimation, resulting in optimization of the execution time and in achieving high resolution, selectivity and the estimation quality. Further, as the essentially multiple-clock-cycle solution, it additionally optimizes hardware complexity. However, as the essential contribution, the completely pipelined implementation enables the proposed filter to additionally improve the time required for execution. The improvement of a clock cycle per each time-frequency point performed within the estimation is provided. This corresponds to the improvement of up to 50% in terms of points lying outside the instantaneous frequency of the estimated signal.