Fan-Out Wafer Level Packaging (FOWLP) has recently seen a tremendous growth in a broad span of application in telecommunications, automotive and other markets. Its versatility allows its continuous development to accommodate more and more types of components. In light of expanding the technology to include new family of sensors such as MEMS/NEMS, Bio-chips with Microfluidics, magneto-resistive devices and Micro-batteries, the upper limit temperature of FOWLP processing has to be challenged. FOWLP, namely the WLFO technology of NANIUM, based on Infineon/ Intel eWLB technology, is a packaging technology based on wafer reconstitution and RDL processes. The “LTC - low temperature cure” dielectrics used today, are cured at > 200ºC, while solder ball soldering peaks ~260ºC. Despite being considered low temperature, this limit is still not compatible and considered high to a wide range of the new family of sensors targeted to integrate in WLFO. In this work we describe the strategy to lower overall process temperature to